Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO l

qemu-riscv

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Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO l

From:	Philippe Mathieu-Daudé
Subject:	Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO lines
Date:	Fri, 9 Jul 2021 09:25:50 +0200
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 7/9/21 5:30 AM, Alistair Francis wrote:
> Expose the 12 interrupt pending bits in MIP as GPIO lines.
> 
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/cpu.c | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

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Re: [PATCH v1 3/5] hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines, (continued)
- [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines, Alistair Francis, 2021/07/08
  - Re: [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines, Philippe Mathieu-Daudé, 2021/07/09
  - Re: [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines, Richard Henderson, 2021/07/09
  - Re: [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines, Anup Patel, 2021/07/13
  - Re: [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines, Anup Patel, 2021/07/13
- [PATCH v1 5/5] hw/intc: ibex_timer: Convert the timer to use RISC-V CPU GPIO lines, Alistair Francis, 2021/07/08
  - Re: [PATCH v1 5/5] hw/intc: ibex_timer: Convert the timer to use RISC-V CPU GPIO lines, Philippe Mathieu-Daudé, 2021/07/09
  - Re: [PATCH v1 5/5] hw/intc: ibex_timer: Convert the timer to use RISC-V CPU GPIO lines, Richard Henderson, 2021/07/09
- Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO lines, Philippe Mathieu-Daudé <=
- Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO lines, Richard Henderson, 2021/07/09
- Re: [PATCH v1 1/5] target/riscv: Expose interrupt pending bits as GPIO lines, Bin Meng, 2021/07/10

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