Re: [PATCH v3 3/3] target/riscv: Drop support for ISA spec version 1.09.1

[Bin Meng]

On Wed, May 27, 2020 at 6:55 AM Alistair Francis
<address@hidden> wrote:
>
> The RISC-V ISA spec version 1.09.1 has been deprecated in QEMU since
> 4.1. It's not commonly used so let's remove support for it.
>
> Signed-off-by: Alistair Francis <address@hidden>
> ---
>  target/riscv/cpu.h                            |   1 -
>  target/riscv/cpu.c                            |   2 -
>  target/riscv/cpu_helper.c                     |  82 +++++-------
>  target/riscv/csr.c                            | 118 +++---------------
>  .../riscv/insn_trans/trans_privileged.inc.c   |  18 +--
>  target/riscv/monitor.c                        |   5 -
>  target/riscv/op_helper.c                      |  17 +--
>  7 files changed, 56 insertions(+), 187 deletions(-)
>

There are 3 more places in csr.c that need to be removed

./target/riscv/csr.c:651:    if (env->priv_ver < PRIV_VERSION_1_10_0) {
./target/riscv/csr.c:660:    if (env->priv_ver < PRIV_VERSION_1_10_0) {
./target/riscv/csr.c:741:    } else if (env->priv_ver >= PRIV_VERSION_1_10_0) {

Regards,
Bin