Re: [PATCH 20/24] riscv: Fix type of SiFive[EU]SocState, member parent_obj

[Alistair Francis]

On Sun, May 17, 2020 at 10:07 PM Markus Armbruster <address@hidden> wrote:
>
> Device "riscv.sifive.e.soc" is a direct subtype of TYPE_DEVICE, but
> its instance struct SiFiveESoCState's member @parent_obj is
> SysBusDevice instead of DeviceState.  Correct that.
>
> Same for "riscv.sifive.u.soc"'s instance struct SiFiveUSoCState.
>
> Cc: Palmer Dabbelt <address@hidden>
> Cc: Alistair Francis <address@hidden>
> Cc: Sagar Karandikar <address@hidden>
> Cc: Bastian Koppelmann <address@hidden>
> Cc: address@hidden
> Signed-off-by: Markus Armbruster <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>  include/hw/riscv/sifive_e.h | 2 +-
>  include/hw/riscv/sifive_u.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
> index 25ce7aa9d5..f05644df7c 100644
> --- a/include/hw/riscv/sifive_e.h
> +++ b/include/hw/riscv/sifive_e.h
> @@ -29,7 +29,7 @@
>
>  typedef struct SiFiveESoCState {
>      /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>
>      /*< public >*/
>      RISCVHartArrayState cpus;
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index 16c297ec5f..5f62cf5f85 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -31,7 +31,7 @@
>
>  typedef struct SiFiveUSoCState {
>      /*< private >*/
> -    SysBusDevice parent_obj;
> +    DeviceState parent_obj;
>
>      /*< public >*/
>      CPUClusterState e_cluster;
> --
> 2.21.1
>
>