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[PATCH 21/26] target/ppc: add helper to write per-LPAR SPRs
From: |
Nicholas Piggin |
Subject: |
[PATCH 21/26] target/ppc: add helper to write per-LPAR SPRs |
Date: |
Fri, 19 Jan 2024 01:06:39 +1000 |
An SPR can be either per-thread, per-core, or per-LPAR. Per-LPAR means
per-thread or per-core, depending on 1LPAR mode.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/spr_common.h | 2 ++
target/ppc/translate.c | 26 ++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/target/ppc/spr_common.h b/target/ppc/spr_common.h
index 9e40b3b608..85f73b860b 100644
--- a/target/ppc/spr_common.h
+++ b/target/ppc/spr_common.h
@@ -83,6 +83,8 @@ void spr_read_generic(DisasContext *ctx, int gprn, int sprn);
void spr_write_generic(DisasContext *ctx, int sprn, int gprn);
void spr_write_generic32(DisasContext *ctx, int sprn, int gprn);
void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn);
+void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn);
+void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn);
void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn);
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index c5089f90f6..e7749d9b32 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -472,6 +472,32 @@ void spr_core_write_generic(DisasContext *ctx, int sprn,
int gprn)
spr_store_dump_spr(sprn);
}
+void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn)
+{
+ TCGv t0 = tcg_temp_new();
+ if (!(ctx->flags & POWERPC_FLAG_SMT)) {
+ spr_write_generic32(ctx, sprn, gprn);
+ return;
+ }
+
+ if (!gen_serialize(ctx)) {
+ return;
+ }
+
+ tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]);
+ gen_helper_spr_core_write_generic(tcg_env, tcg_constant_i32(sprn), t0);
+ spr_store_dump_spr(sprn);
+}
+
+void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn)
+{
+ if (ctx->flags & POWERPC_FLAG_SMT_1LPAR) {
+ spr_core_write_generic(ctx, sprn, gprn);
+ } else {
+ spr_write_generic(ctx, sprn, gprn);
+ }
+}
+
static void spr_write_CTRL_ST(DisasContext *ctx, int sprn, int gprn)
{
/* This does not implement >1 thread */
--
2.42.0
- [PATCH 14/26] target/ppc: Add new hflags to support BHRB, (continued)
- [PATCH 14/26] target/ppc: Add new hflags to support BHRB, Nicholas Piggin, 2024/01/18
- [PATCH 15/26] target/ppc: Add recording of taken branches to BHRB, Nicholas Piggin, 2024/01/18
- [PATCH 17/26] target/ppc: Add migration support for BHRB, Nicholas Piggin, 2024/01/18
- [PATCH 18/26] target/ppc: BookE DECAR SPR is 32-bit, Nicholas Piggin, 2024/01/18
- [PATCH 16/26] target/ppc: Add clrbhrb and mfbhrbe instructions, Nicholas Piggin, 2024/01/18
- [PATCH 22/26] target/ppc: Add SMT support to simple SPRs, Nicholas Piggin, 2024/01/18
- [PATCH 24/26] target/ppc: Implement LDBAR, TTR SPRs, Nicholas Piggin, 2024/01/18
- [PATCH 23/26] target/ppc: Add SMT support to PTCR SPR, Nicholas Piggin, 2024/01/18
- [PATCH 19/26] target/ppc: Wire up BookE ATB registers for e500 family, Nicholas Piggin, 2024/01/18
- [PATCH 20/26] target/ppc: Add PPR32 SPR, Nicholas Piggin, 2024/01/18
- [PATCH 21/26] target/ppc: add helper to write per-LPAR SPRs,
Nicholas Piggin <=
- [PATCH 26/26] target/ppc: add SMT support to msgsnd broadcast, Nicholas Piggin, 2024/01/18
- [PATCH 25/26] target/ppc: Implement SPRC/SPRD SPRs, Nicholas Piggin, 2024/01/18
- Re: [PATCH 00/26] target/ppc: TCG improvements and fixes, Cédric Le Goater, 2024/01/19