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[PATCH v2 3/8] target/ppc: 74xx: Machine Check exception cleanup
From: |
Fabiano Rosas |
Subject: |
[PATCH v2 3/8] target/ppc: 74xx: Machine Check exception cleanup |
Date: |
Thu, 27 Jan 2022 17:11:11 -0300 |
The 74xx don't have an MSR_HV.
Also remove 40x and BookE code.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
target/ppc/excp_helper.c | 24 ------------------------
1 file changed, 24 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 13e5cb3ddc..0d8c66b98f 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -612,34 +612,10 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
cs->halted = 1;
cpu_interrupt_exittb(cs);
}
- if (env->msr_mask & MSR_HVB) {
- /*
- * ISA specifies HV, but can be delivered to guest with HV
- * clear (e.g., see FWNMI in PAPR).
- */
- new_msr |= (target_ulong)MSR_HVB;
- }
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
- /* XXX: should also have something loaded in DAR / DSISR */
- switch (excp_model) {
- case POWERPC_EXCP_40x:
- srr0 = SPR_40x_SRR2;
- srr1 = SPR_40x_SRR3;
- break;
- case POWERPC_EXCP_BOOKE:
- /* FIXME: choose one or the other based on CPU type */
- srr0 = SPR_BOOKE_MCSRR0;
- srr1 = SPR_BOOKE_MCSRR1;
-
- env->spr[SPR_BOOKE_CSRR0] = env->nip;
- env->spr[SPR_BOOKE_CSRR1] = msr;
- break;
- default:
- break;
- }
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
trace_ppc_excp_dsi(env->spr[SPR_DSISR], env->spr[SPR_DAR]);
--
2.34.1
- [PATCH v2 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n), Fabiano Rosas, 2022/01/27
- [PATCH v2 1/8] target/ppc: Introduce powerpc_excp_74xx, Fabiano Rosas, 2022/01/27
- [PATCH v2 6/8] target/ppc: 74xx: System Call exception cleanup, Fabiano Rosas, 2022/01/27
- [PATCH v2 2/8] target/ppc: Simplify powerpc_excp_74xx, Fabiano Rosas, 2022/01/27
- [PATCH v2 5/8] target/ppc: 74xx: Program exception cleanup, Fabiano Rosas, 2022/01/27
- [PATCH v2 3/8] target/ppc: 74xx: Machine Check exception cleanup,
Fabiano Rosas <=
- [PATCH v2 7/8] target/ppc: 74xx: System Reset interrupt cleanup, Fabiano Rosas, 2022/01/27
- [PATCH v2 8/8] target/ppc: 74xx: Set SRRs directly in exception code, Fabiano Rosas, 2022/01/27
- [PATCH v2 4/8] target/ppc: 74xx: External interrupt cleanup, Fabiano Rosas, 2022/01/27
- Re: [PATCH v2 0/8] target/ppc: powerpc_excp improvements [74xx] (5/n), Mark Cave-Ayland, 2022/01/27