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Re: [EXT] - Re: Help with ppc e500 tlb usage
From: |
Jesse Millwood |
Subject: |
Re: [EXT] - Re: Help with ppc e500 tlb usage |
Date: |
Fri, 21 Jan 2022 18:38:38 +0000 |
On Fri, 2022-01-21 at 18:57 +0100, Cédric Le Goater wrote:
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> > Thanks for the background info Cédric, I wasn't aware of the MMUv2.
> > I see now that in target/ppc/cpu_init.c the e500v2 and e5500 have
> > the same mmu_model, the POWREPC_MMU_BOOKE206.
> > I'd like to be able to set the initial tlb entry size from the
> > platform definition by indicating the size in kib. I'll just use
> > the 2^TSIZE then.
>
> Well, the approach of adding a class attribute and for a new machine
> is the right one.
Are you saying this so that I can conditionally compute the accurate TSIZE
value that matches the real world machine?
I'm still trying to get my head wrapped around the QOM. Would you advise adding
a class attribute to the CPUPPCState or the PPCE500MachineClass? The
CPUPPCState has the mmu_model field. However, that is the POWERPC_MMU_BOOKE206.
Is there somewhere else you had in mind adding an attribute?
> > > The e500 only supports the following page sizes:
> > >
> > > 0b0001 4KB
> > > 0b0010 16KB
> > > 0b0011 64KB
> > > 0b0100 256KB
> > > 0b1011 4GB
> > > 0b0101 1MB
> > > 0b0110 4MB
> > > 0b0111 16MB
> > > 0b1000 64MB
> > > 0b1001 256MB
> > > 0b1010 1GB
> > >
> >
> > Is that how much the emulated e500 supports? The E500 Core
> > Reference manual states that it supports up to 4GiB.
>
> Yes the list is out of order ! :)
Oh shoot, yeah I missed that.
>
> Thanks,
>
> C.