On 21 Jan 2022, at 11:17, Cédric Le Goater <clg@kaod.org> wrote:
Hello Vitaly
On 1/21/22 01:02, Vitaly Cheptsov wrote:
Hello,
PowerPC e500mc defines MSR bit 35 differently from most other PowerPC variants.
In particular, for e500mc this is GS (Guest Supervisor) bit[1], while for
others it is NOEXEC GUARD bit[2].
QEMU ignores this architectural difference when handling the exceptions of
attempting to run not executable code on e500mc, and mistakenly sets the GS
bit[3][4].
Setting this bit eventually leads to crashes, because although QEMU does not
support Guest Supervisor mode on e500mc, it still requires it to be disabled[5].
This looks correct and even fixing an issue that Mario reported
on the TCG e6500 CPU with a kernel + KVM compiled in :
https://lore.kernel.org/all/R5JFVM$911E343FF81933B99D53FD0992D8848F@locati.it/
KVM has some issues also with the e6500 but that's another problem
I think.
What is your environment ? Which QEMU machine ? Can you provide a
command line ?
Could you please resend the patch in a non attached way ? See :
https://www.qemu.org/docs/master/devel/submitting-a-patch.html
and copy qemu-devel.
Thanks,
C.
Best regards,
Vitaly
[1] https://www.nxp.com/docs/en/reference-manual/E500MCRM.pdf, 2.7.1 MSR
[2] https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0, 6.5.5
Instruction Storage Interrupt
[3] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/mmu_common.c#L1426
[4] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/excp_helper.c#L414-L416
[5] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/mmu_helper.c#L1078-L1080