[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH] target/ppc/mmu_common: Fix SRR1/MSR error code on Book-E
From: |
Vitaly Cheptsov |
Subject: |
[PATCH] target/ppc/mmu_common: Fix SRR1/MSR error code on Book-E |
Date: |
Fri, 21 Jan 2022 03:02:45 +0300 |
Hello,
PowerPC e500mc defines MSR bit 35 differently from most other PowerPC variants.
In particular, for e500mc this is GS (Guest Supervisor) bit[1], while for
others it is NOEXEC GUARD bit[2].
QEMU ignores this architectural difference when handling the exceptions of
attempting to run not executable code on e500mc, and mistakenly sets the GS
bit[3][4].
Setting this bit eventually leads to crashes, because although QEMU does not
support Guest Supervisor mode on e500mc, it still requires it to be disabled[5].
Best regards,
Vitaly
[1] https://www.nxp.com/docs/en/reference-manual/E500MCRM.pdf, 2.7.1 MSR
[2] https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0, 6.5.5
Instruction Storage Interrupt
[3] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/mmu_common.c#L1426
[4] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/excp_helper.c#L414-L416
[5] https://github.com/qemu/qemu/blob/v6.2.0/target/ppc/mmu_helper.c#L1078-L1080
ppc-msr.patch
Description: Binary data
signature.asc
Description: Message signed with OpenPGP
- [PATCH] target/ppc/mmu_common: Fix SRR1/MSR error code on Book-E,
Vitaly Cheptsov <=