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Re: [PATCH qemu] spapr: Force 32bit when resetting a core


From: Alexey Kardashevskiy
Subject: Re: [PATCH qemu] spapr: Force 32bit when resetting a core
Date: Mon, 10 Jan 2022 13:52:06 +1100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:96.0) Gecko/20100101 Thunderbird/96.0



On 08/01/2022 00:39, Greg Kurz wrote:
On Fri, 7 Jan 2022 23:19:03 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:

On Fri, Jan 07, 2022 at 12:57:47PM +0100, Greg Kurz wrote:
On Fri, 7 Jan 2022 18:24:23 +1100
Alexey Kardashevskiy <aik@ozlabs.ru> wrote:

"PowerPC Processor binding to IEEE 1275" says in
"8.2.1. Initial Register Values" that the initial state is defined as
32bit so do it for both SLOF and VOF.

This should not cause behavioral change as SLOF switches to 64bit very
early anyway.

Only one CPU goes through SLOF. What about the other ones, including
hot plugged CPUs ?

Those will be started by the start-cpu RTAS call which has its own
semantics.


Ah indeed, there's code in linux/arch/powerpc/kernel/head_64.S to switch
secondaries to 64bit... but then, as noted by Cedric, ppc_cpu_reset(),
which is called earlier sets MSR_SF but the changelog of commit 8b9f2118ca40
doesn't provide much details on the motivation. Any idea ?

https://patchwork.kernel.org/project/qemu-devel/patch/1458121432-2855-1-git-send-email-lvivier@redhat.com/

this is probably it:

===
Reset is properly defined as an exception (0x100). For exceptions, the
970MP user manual for example says:

4.5 Exception Definitions
When an exception/interrupt is taken, all bits in the MSR are set to
‘0’, with the following exceptions:
• Exceptions always set MSR[SF] to ‘1’.
===

but it looks like the above is about emulation bare metal 970 rather than pseries VCPU so that quote does not apply to spapr.



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