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[RFC PATCH 4/4] target/ppc: isolated cpu init from translation logic
From: |
Bruno Larsen (billionai) |
Subject: |
[RFC PATCH 4/4] target/ppc: isolated cpu init from translation logic |
Date: |
Fri, 23 Apr 2021 16:18:07 -0300 |
finished isolation of CPU initialization logic from
translation logic. CPU initialization now only has common code
and may or may not call accelerator-specific code, as the
build options require.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
---
target/ppc/{translate_init.c.inc => cpu_init.c} | 11 ++++++++++-
target/ppc/meson.build | 1 +
target/ppc/translate.c | 4 +++-
3 files changed, 14 insertions(+), 2 deletions(-)
rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c
similarity index 99%
rename from target/ppc/translate_init.c.inc
rename to target/ppc/cpu_init.c
index 33e44f1363..38e4c87aa5 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/cpu_init.c
@@ -18,6 +18,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
+#include "qemu/osdep.h"
#include "disas/dis-asm.h"
#include "exec/gdbstub.h"
#include "kvm_ppc.h"
@@ -42,6 +43,9 @@
#include "fpu/softfloat.h"
#include "qapi/qapi-commands-machine-target.h"
+#include "helper_regs.h"
+#include "internal.h"
+
/* #define PPC_DUMP_CPU */
/* #define PPC_DEBUG_SPR */
/* #define PPC_DUMP_SPR_ACCESSES */
@@ -51,7 +55,12 @@ static inline void vscr_init(CPUPPCState *env, uint32_t val)
{
/* Altivec always uses round-to-nearest */
set_float_rounding_mode(float_round_nearest_even, &env->vec_status);
- helper_mtvscr(env, val);
+ /*
+ * This comment is here just so the project will build.
+ * The current solution is in another patch and will be
+ * added when we figure out an internal fork of qemu
+ */
+ /* helper_mtvscr(env, val); */
}
/*
diff --git a/target/ppc/meson.build b/target/ppc/meson.build
index aaee5e7c0c..14f0ba5d48 100644
--- a/target/ppc/meson.build
+++ b/target/ppc/meson.build
@@ -2,6 +2,7 @@ ppc_ss = ss.source_set()
ppc_ss.add(files(
'cpu-models.c',
'cpu.c',
+ 'cpu_init.c',
'dfp_helper.c',
'excp_helper.c',
'fpu_helper.c',
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index bb893be928..a4d9fb8d54 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -37,6 +37,9 @@
#include "exec/log.h"
#include "qemu/atomic128.h"
+#include "qemu/qemu-print.h"
+#include "qapi/error.h"
+#include "internal.h"
#define CPU_SINGLE_STEP 0x1
#define CPU_BRANCH_STEP 0x2
@@ -7593,7 +7596,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F,
0x03FFF800, \
};
#include "helper_regs.h"
-#include "translate_init.c.inc"
/*****************************************************************************/
/* Misc PowerPC helpers */
--
2.17.1
- Re: [RFC PATCH 1/4] target/ppc: move opcode table logic to translate.c, (continued)
[RFC PATCH 2/4] target/ppc: isolated SPR read/write callbacks, Bruno Larsen (billionai), 2021/04/23
[RFC PATCH 3/4] target/ppc: Move SPR generation to separate file, Bruno Larsen (billionai), 2021/04/23
[RFC PATCH 4/4] target/ppc: isolated cpu init from translation logic,
Bruno Larsen (billionai) <=
Re: [RFC PATCH 0/4] target/ppc: code motion to compile translate_init, Richard Henderson, 2021/04/23