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Re: [PATCH 2/9] ppc/pnv: Use address_space_stq_be() when triggering an i
From: |
David Gibson |
Subject: |
Re: [PATCH 2/9] ppc/pnv: Use address_space_stq_be() when triggering an interrupt from PSI |
Date: |
Mon, 14 Oct 2019 16:30:05 +1100 |
User-agent: |
Mutt/1.12.1 (2019-06-15) |
On Mon, Oct 07, 2019 at 10:40:55AM +0200, Cédric Le Goater wrote:
> Include the XIVE_TRIGGER_PQ bit in the trigger data which is how
> hardware signals to the IC that the PQ bits of the interrupt source
> have been checked.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Applied to ppc-for-4.2, thanks.
> ---
> hw/ppc/pnv_psi.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
> index a997f16bb4e6..68d0dfacfe2b 100644
> --- a/hw/ppc/pnv_psi.c
> +++ b/hw/ppc/pnv_psi.c
> @@ -660,10 +660,19 @@ static void pnv_psi_notify(XiveNotifier *xf, uint32_t
> srcno)
>
> uint32_t offset =
> (psi->regs[PSIHB_REG(PSIHB9_IVT_OFFSET)] >> PSIHB9_IVT_OFF_SHIFT);
> - uint64_t lisn = cpu_to_be64(offset + srcno);
> + uint64_t data = XIVE_TRIGGER_PQ | offset | srcno;
> + MemTxResult result;
>
> - if (valid) {
> - cpu_physical_memory_write(notify_addr, &lisn, sizeof(lisn));
> + if (!valid) {
> + return;
> + }
> +
> + address_space_stq_be(&address_space_memory, notify_addr, data,
> + MEMTXATTRS_UNSPECIFIED, &result);
> + if (result != MEMTX_OK) {
> + qemu_log_mask(LOG_GUEST_ERROR, "%s: trigger failed @%"
> + HWADDR_PRIx "\n", __func__, notif_port);
> + return;
> }
> }
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [PATCH 0/9] ppc/pnv: XIVE cleanup and fixes, Cédric Le Goater, 2019/10/07
- [PATCH 4/9] ppc/xive: Introduce helpers for the NVT id, Cédric Le Goater, 2019/10/07
- [PATCH 3/9] ppc/xive: Record the IPB in the associated NVT, Cédric Le Goater, 2019/10/07
- [PATCH 2/9] ppc/pnv: Use address_space_stq_be() when triggering an interrupt from PSI, Cédric Le Goater, 2019/10/07
- Re: [PATCH 2/9] ppc/pnv: Use address_space_stq_be() when triggering an interrupt from PSI,
David Gibson <=
- [PATCH 8/9] ppc/xive: Introduce OS CAM line helpers, Cédric Le Goater, 2019/10/07
- [PATCH 6/9] ppc/pnv: Dump the XIVE NVT table, Cédric Le Goater, 2019/10/07
- [PATCH 7/9] ppc/pnv: Quiesce some XIVE errors, Cédric Le Goater, 2019/10/07
- [PATCH 1/9] ppc/pnv: Improve trigger data definition, Cédric Le Goater, 2019/10/07
- [PATCH 9/9] ppc/xive: Check V bit in TM_PULL_POOL_CTX, Cédric Le Goater, 2019/10/07
- [PATCH 5/9] ppc/pnv: Remove pnv_xive_vst_size() routine, Cédric Le Goater, 2019/10/07
- Re: [PATCH 0/9] ppc/pnv: XIVE cleanup and fixes, Cédric Le Goater, 2019/10/21