[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 4/8] target/ppc: Improve comment of bcctr used for spec
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 4/8] target/ppc: Improve comment of bcctr used for spectre v2 mitigation |
Date: |
Fri, 29 Mar 2019 14:29:25 +1100 |
From: Greg Kurz <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 576210d901..badc1ae1a3 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3753,7 +3753,15 @@ static void gen_bcond(DisasContext *ctx, int type)
* All ISAs up to v3 describe this form of bcctr as invalid but
* some processors, ie. 64-bit server processors compliant with
* arch 2.x, do implement a "test and decrement" logic instead,
- * as described in their respective UMs.
+ * as described in their respective UMs. This logic involves CTR
+ * to act as both the branch target and a counter, which makes
+ * it basically useless and thus never used in real code.
+ *
+ * This form was hence chosen to trigger extra micro-architectural
+ * side-effect on real HW needed for the Spectre v2 workaround.
+ * It is up to guests that implement such workaround, ie. linux, to
+ * use this form in a way it just triggers the side-effect without
+ * doing anything else harmful.
*/
if (unlikely(!is_book3s_arch2x(ctx))) {
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
--
2.20.1
- [Qemu-ppc] [PULL 0/8] ppc-for-4.0 queue 20190329, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 3/8] target/ppc: Consolidate 64-bit server processor detection in a helper, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 2/8] target/ppc: Enable "decrement and test CTR" version of bcctr, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 5/8] target/ppc: Fix QEMU crash with stxsdx, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 8/8] exec: Only count mapped memory backends for qemu_getrampagesize(), David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 7/8] spapr/irq: Add XIVE sanity checks on non-P9 machines, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 6/8] spapr: Simplify handling of host-serial and host-model values, David Gibson, 2019/03/28
- [Qemu-ppc] [PULL 4/8] target/ppc: Improve comment of bcctr used for spectre v2 mitigation,
David Gibson <=
- [Qemu-ppc] [PULL 1/8] target/ppc: Fix TCG temporary leaks in gen_bcond(), David Gibson, 2019/03/28
- Re: [Qemu-ppc] [PULL 0/8] ppc-for-4.0 queue 20190329, Peter Maydell, 2019/03/29