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[Qemu-ppc] [PATCH v2 14/15] ppc/pnv: add a "ibm, opal/power-mgt" device
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH v2 14/15] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9 |
Date: |
Thu, 7 Mar 2019 23:35:47 +0100 |
Activate only stop0 and stop1 levels. We should not need more levels
when under QEMU.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ppc/pnv.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index e68d419203e8..8be4d4cbf785 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -438,6 +438,16 @@ static void pnv_dt_isa(PnvMachineState *pnv, void *fdt)
&args);
}
+static void pnv_dt_power_mgt(void *fdt)
+{
+ int off;
+
+ off = fdt_add_subnode(fdt, 0, "ibm,opal");
+ off = fdt_add_subnode(fdt, off, "power-mgt");
+
+ _FDT(fdt_setprop_cell(fdt, off, "ibm,enabled-stop-levels", 0xc0000000));
+}
+
static void *pnv_dt_create(MachineState *machine)
{
const char plat_compat[] = "qemu,powernv\0ibm,powernv";
@@ -493,6 +503,11 @@ static void *pnv_dt_create(MachineState *machine)
pnv_dt_bmc_sensors(pnv->bmc, fdt);
}
+ /* Create an extra node for power management on Power9 */
+ if (pnv_is_power9(pnv)) {
+ pnv_dt_power_mgt(fdt);
+ }
+
return fdt;
}
--
2.20.1
- [Qemu-ppc] [PATCH v2 09/15] ppc/pnv: add a OCC model for POWER9, (continued)
- [Qemu-ppc] [PATCH v2 09/15] ppc/pnv: add a OCC model for POWER9, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 13/15] ppc/pnv: add more dummy XSCOM addresses, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 12/15] ppc/pnv: activate XSCOM tests for POWER9, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 02/15] ppc/pnv: add a PSI bridge model for POWER9, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 10/15] ppc/pnv: extend XSCOM core support for POWER9, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 14/15] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH v2 11/15] ppc/pnv: POWER9 XSCOM quad support, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 05/15] ppc/pnv: add a 'dt_isa_nodename' to the chip, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 07/15] ppc/pnv: add SerIRQ routing registers, Cédric Le Goater, 2019/03/07
- [Qemu-ppc] [PATCH v2 01/15] ppc/pnv: add a PSI bridge class model, Cédric Le Goater, 2019/03/07