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Re: [Qemu-ppc] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() oper
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() operation to the chip model |
Date: |
Thu, 7 Mar 2019 12:44:27 +1100 |
User-agent: |
Mutt/1.11.3 (2019-02-01) |
On Wed, Mar 06, 2019 at 09:50:12AM +0100, Cédric Le Goater wrote:
> The POWER9 and POWER8 processors have a different set of devices and a
> different device tree layout.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Applied, thanks.
> ---
> include/hw/ppc/pnv.h | 1 +
> hw/ppc/pnv.c | 27 +++++++++++++++++++++++++--
> 2 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index ebbb3d0e9aa7..fa9ec50fd5be 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -102,6 +102,7 @@ typedef struct PnvChipClass {
> uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
> void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
> ISABus *(*isa_create)(PnvChip *chip, Error **errp);
> + void (*dt_populate)(PnvChip *chip, void *fdt);
> } PnvChipClass;
>
> #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index a7ec76dbd6c7..087541a91a72 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -267,7 +267,7 @@ static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t
> pir,
> g_free(reg);
> }
>
> -static void pnv_dt_chip(PnvChip *chip, void *fdt)
> +static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt)
> {
> const char *typename = pnv_chip_core_typename(chip);
> size_t typesize = object_type_get_instance_size(typename);
> @@ -289,6 +289,25 @@ static void pnv_dt_chip(PnvChip *chip, void *fdt)
> }
> }
>
> +static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt)
> +{
> + const char *typename = pnv_chip_core_typename(chip);
> + size_t typesize = object_type_get_instance_size(typename);
> + int i;
> +
> + pnv_dt_xscom(chip, fdt, 0);
> +
> + for (i = 0; i < chip->nr_cores; i++) {
> + PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize);
> +
> + pnv_dt_core(chip, pnv_core, fdt);
> + }
> +
> + if (chip->ram_size) {
> + pnv_dt_memory(fdt, chip->chip_id, chip->ram_start, chip->ram_size);
> + }
> +}
> +
> static void pnv_dt_rtc(ISADevice *d, void *fdt, int lpc_off)
> {
> uint32_t io_base = d->ioport_id;
> @@ -474,7 +493,7 @@ static void *pnv_dt_create(MachineState *machine)
>
> /* Populate device tree for each chip */
> for (i = 0; i < pnv->num_chips; i++) {
> - pnv_dt_chip(pnv->chips[i], fdt);
> + PNV_CHIP_GET_CLASS(pnv->chips[i])->dt_populate(pnv->chips[i], fdt);
> }
>
> /* Populate ISA devices on chip 0 */
> @@ -858,6 +877,7 @@ static void pnv_chip_power8e_class_init(ObjectClass
> *klass, void *data)
> k->core_pir = pnv_chip_core_pir_p8;
> k->intc_create = pnv_chip_power8_intc_create;
> k->isa_create = pnv_chip_power8_isa_create;
> + k->dt_populate = pnv_chip_power8_dt_populate;
> k->xscom_base = 0x003fc0000000000ull;
> dc->desc = "PowerNV Chip POWER8E";
>
> @@ -876,6 +896,7 @@ static void pnv_chip_power8_class_init(ObjectClass
> *klass, void *data)
> k->core_pir = pnv_chip_core_pir_p8;
> k->intc_create = pnv_chip_power8_intc_create;
> k->isa_create = pnv_chip_power8_isa_create;
> + k->dt_populate = pnv_chip_power8_dt_populate;
> k->xscom_base = 0x003fc0000000000ull;
> dc->desc = "PowerNV Chip POWER8";
>
> @@ -894,6 +915,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass
> *klass, void *data)
> k->core_pir = pnv_chip_core_pir_p8;
> k->intc_create = pnv_chip_power8_intc_create;
> k->isa_create = pnv_chip_power8nvl_isa_create;
> + k->dt_populate = pnv_chip_power8_dt_populate;
> k->xscom_base = 0x003fc0000000000ull;
> dc->desc = "PowerNV Chip POWER8NVL";
>
> @@ -954,6 +976,7 @@ static void pnv_chip_power9_class_init(ObjectClass
> *klass, void *data)
> k->core_pir = pnv_chip_core_pir_p9;
> k->intc_create = pnv_chip_power9_intc_create;
> k->isa_create = pnv_chip_power9_isa_create;
> + k->dt_populate = pnv_chip_power9_dt_populate;
> k->xscom_base = 0x00603fc00000000ull;
> dc->desc = "PowerNV Chip POWER9";
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH 00/27] ppc: add POWER9 support to the PowerNV platform, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 04/27] ppc/pnv: export the xive_router_notify() routine, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 03/27] ppc/xive: export the TIMA memory accessors, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() operation to the chip model, Cédric Le Goater, 2019/03/06
- Re: [Qemu-ppc] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() operation to the chip model,
David Gibson <=
- [Qemu-ppc] [PATCH 11/27] ppc/pnv: fix logging primitives using Ox, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 02/27] ppc: externalize ppc_get_vcpu_by_pir(), Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 12/27] ppc/pnv: psi: add a PSIHB_REG macro, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 05/27] ppc/pnv: change the CPU machine_data presenter type to Object *, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 10/27] ppc/xive: Make XIVE generate the proper interrupt types, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 15/27] ppc/pnv: add a PSI bridge model for POWER9, Cédric Le Goater, 2019/03/06