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[Qemu-ppc] [PATCH 05/27] ppc/pnv: change the CPU machine_data presenter
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH 05/27] ppc/pnv: change the CPU machine_data presenter type to Object * |
Date: |
Wed, 6 Mar 2019 09:50:10 +0100 |
The POWER9 PowerNV machine will use a XIVE interrupt presenter type.
Signed-off-by: Cédric Le Goater <address@hidden>
---
include/hw/ppc/pnv_core.h | 2 +-
hw/ppc/pnv.c | 6 +++---
hw/ppc/pnv_core.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 9961ea3a92cd..6874bb847a01 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -48,7 +48,7 @@ typedef struct PnvCoreClass {
#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
typedef struct PnvCPUState {
- struct ICPState *icp;
+ Object *intc;
} PnvCPUState;
static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 9aa81c7f09c2..b90d03711a05 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -684,7 +684,7 @@ static void pnv_chip_power8_intc_create(PnvChip *chip,
PowerPCCPU *cpu,
return;
}
- pnv_cpu->icp = ICP(obj);
+ pnv_cpu->intc = obj;
}
/*
@@ -1086,7 +1086,7 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir)
{
PowerPCCPU *cpu = ppc_get_vcpu_by_pir(pir);
- return cpu ? pnv_cpu_state(cpu)->icp : NULL;
+ return cpu ? ICP(pnv_cpu_state(cpu)->intc) : NULL;
}
static void pnv_pic_print_info(InterruptStatsProvider *obj,
@@ -1099,7 +1099,7 @@ static void pnv_pic_print_info(InterruptStatsProvider
*obj,
CPU_FOREACH(cs) {
PowerPCCPU *cpu = POWERPC_CPU(cs);
- icp_pic_print_info(pnv_cpu_state(cpu)->icp, mon);
+ icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), mon);
}
for (i = 0; i < pnv->num_chips; i++) {
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 7c806da720c6..38179cdc53dc 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -198,7 +198,7 @@ static void pnv_unrealize_vcpu(PowerPCCPU *cpu)
PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
qemu_unregister_reset(pnv_cpu_reset, cpu);
- object_unparent(OBJECT(pnv_cpu_state(cpu)->icp));
+ object_unparent(OBJECT(pnv_cpu_state(cpu)->intc));
cpu_remove_sync(CPU(cpu));
cpu->machine_data = NULL;
g_free(pnv_cpu);
--
2.20.1
- [Qemu-ppc] [PATCH 00/27] ppc: add POWER9 support to the PowerNV platform, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 04/27] ppc/pnv: export the xive_router_notify() routine, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 03/27] ppc/xive: export the TIMA memory accessors, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() operation to the chip model, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 11/27] ppc/pnv: fix logging primitives using Ox, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 02/27] ppc: externalize ppc_get_vcpu_by_pir(), Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 12/27] ppc/pnv: psi: add a PSIHB_REG macro, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 05/27] ppc/pnv: change the CPU machine_data presenter type to Object *,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH 10/27] ppc/xive: Make XIVE generate the proper interrupt types, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 15/27] ppc/pnv: add a PSI bridge model for POWER9, Cédric Le Goater, 2019/03/06
- [Qemu-ppc] [PATCH 09/27] ppc/xive: activate HV support, Cédric Le Goater, 2019/03/06