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[Qemu-ppc] [PATCH 15/19] target/ppc: Detect erroneous condition in inter
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH 15/19] target/ppc: Detect erroneous condition in interrupt delivery |
Date: |
Mon, 28 Jan 2019 10:46:21 +0100 |
From: Benjamin Herrenschmidt <address@hidden>
It's very easy for the CPU specific has_work() implementation
and the logic in ppc_hw_interrupt() to be subtly out of sync.
This can occasionally allow a CPU to wakeup from a PM state
and resume executing past the PM instruction when it should
resume at the 0x100 vector.
This detects if it happens and aborts, making it a lot easier
to catch such bugs when testing rather than chasing obscure
guest misbehaviour.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
---
target/ppc/excp_helper.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 37546bb0f0fe..1a2f469a5fa2 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -878,6 +878,22 @@ static void ppc_hw_interrupt(CPUPPCState *env)
return;
}
}
+
+ if (env->resume_as_sreset) {
+ /*
+ * This is a bug ! It means that has_work took us out of halt without
+ * anything to deliver while in a PM state that requires getting
+ * out via a 0x100
+ *
+ * This means we will incorrectly execute past the power management
+ * instruction instead of triggering a reset.
+ *
+ * It generally means a discrepancy between the wakup conditions in the
+ * processor has_work implementation and the logic in this function.
+ */
+ cpu_abort(CPU(ppc_env_get_cpu(env)),
+ "Wakeup from PM state but interrupt Undelivered");
+ }
}
void ppc_cpu_do_system_reset(CPUState *cs)
--
2.20.1
- [Qemu-ppc] [PATCH 05/19] ppc/pnv: add XIVE support, (continued)
- [Qemu-ppc] [PATCH 05/19] ppc/pnv: add XIVE support, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 13/19] target/ppc: Rename "in_pm_state" to "resume_as_sreset", Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 14/19] target/ppc: Add POWER9 exception model, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 17/19] target/ppc: Add POWER9 external interrupt model, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 16/19] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a separate function, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 12/19] target/ppc: Disable ISA 2.06 PM instructions on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 19/19] target/ppc: Add support for LPCR:HEIC on POWER9, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 09/19] target/ppc: Don't clobber MSR:EE on PM instructions, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 18/19] ppc/xive: Make XIVE generate the proper interrupt types, Cédric Le Goater, 2019/01/28
- [Qemu-ppc] [PATCH 15/19] target/ppc: Detect erroneous condition in interrupt delivery,
Cédric Le Goater <=