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Re: [Qemu-ppc] [PATCH 00/13] target/ppc improve atomic operations
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 00/13] target/ppc improve atomic operations |
Date: |
Fri, 29 Jun 2018 14:15:03 +1000 |
User-agent: |
Mutt/1.10.0 (2018-05-17) |
On Tue, Jun 26, 2018 at 09:19:08AM -0700, Richard Henderson wrote:
> In another patch set this week, I had noticed the old linux-user
> do_store_exclusive code was still present. I had thought that was
> dead code that simply hadn't been removed, but it turned out that
> we had not completed the transition to tcg atomics for linux-user.
>
> In the process, I discovered that we weren't using atomic operations
> for the 128-bit lq, lqarx, and stqcx insns. These would have simply
> produced incorrect results for -smp in system mode.
>
> I tidy the code a bit by making use of MO_ALIGN, which means that
> we don't need a separate explicit alignment check.
>
> I use the new min/max atomic operations I added recently for
> ARMv8.2-Atomics and RISC-V.
>
> Finally, Power9 has some *really* odd atomic operations in its
> l[wd]at and st[wd]at instructions. We were generating illegal
> instruction for these. I implement them for serial context and
> force parallel context to grab the exclusive lock and try again.
>
> Except for the trivial linux-user ll/sc case, I do not have any
> code that exercises these instructions. Perhaps the IBM folk
> have something that can test the others?
I've now applied the whole series to ppc-for-3.0.
>
>
> r~
>
>
> Richard Henderson (13):
> target/ppc: Add do_unaligned_access hook
> target/ppc: Use atomic load for LQ and LQARX
> target/ppc: Use atomic store for STQ
> target/ppc: Use atomic cmpxchg for STQCX
> target/ppc: Remove POWERPC_EXCP_STCX
> target/ppc: Tidy gen_conditional_store
> target/ppc: Split out gen_load_locked
> target/ppc: Split out gen_ld_atomic
> target/ppc: Split out gen_st_atomic
> target/ppc: Use MO_ALIGN for EXIWX and ECOWX
> target/ppc: Use atomic min/max helpers
> target/ppc: Implement the rest of gen_ld_atomic
> target/ppc: Implement the rest of gen_st_atomic
>
> target/ppc/cpu.h | 8 +-
> target/ppc/helper.h | 11 +
> target/ppc/internal.h | 5 +
> linux-user/ppc/cpu_loop.c | 123 ++----
> target/ppc/excp_helper.c | 18 +-
> target/ppc/mem_helper.c | 72 +++-
> target/ppc/translate.c | 648 ++++++++++++++++++++------------
> target/ppc/translate_init.inc.c | 1 +
> 8 files changed, 539 insertions(+), 347 deletions(-)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH 05/13] target/ppc: Remove POWERPC_EXCP_STCX, (continued)
- [Qemu-ppc] [PATCH 05/13] target/ppc: Remove POWERPC_EXCP_STCX, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 06/13] target/ppc: Tidy gen_conditional_store, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 07/13] target/ppc: Split out gen_load_locked, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 09/13] target/ppc: Split out gen_st_atomic, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 08/13] target/ppc: Split out gen_ld_atomic, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 10/13] target/ppc: Use MO_ALIGN for EXIWX and ECOWX, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 12/13] target/ppc: Implement the rest of gen_ld_atomic, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 04/13] target/ppc: Use atomic cmpxchg for STQCX, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 11/13] target/ppc: Use atomic min/max helpers, Richard Henderson, 2018/06/26
- [Qemu-ppc] [PATCH 13/13] target/ppc: Implement the rest of gen_st_atomic, Richard Henderson, 2018/06/26
- Re: [Qemu-ppc] [PATCH 00/13] target/ppc improve atomic operations,
David Gibson <=