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[Qemu-ppc] [PULL 25/25] mac_newworld: always enable disable_direct_reg3_
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 25/25] mac_newworld: always enable disable_direct_reg3_writes for ADB machines |
Date: |
Fri, 22 Jun 2018 20:35:28 +1000 |
From: Mark Cave-Ayland <address@hidden>
Commit 84051eb400 "adb: add property to disable direct reg 3 writes" added a
workaround for MacOS 9 incorrectly setting the mouse address during boot of
PMU machines.
Further testing has shown that since fb6649f172 "adb: fix read reg 3 byte
ordering" this can still sometimes happen with the CUDA mac99 machine,
so let's enable this workaround for all New World machines using ADB for now.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/mac_newworld.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index ff715ffffd..2b13fcdde5 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -407,11 +407,11 @@ static void ppc_core99_init(MachineState *machine)
adb_bus = qdev_get_child_bus(dev, "adb.0");
dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
- qdev_prop_set_bit(dev, "disable-direct-reg3-writes", has_pmu);
+ qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
qdev_init_nofail(dev);
dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
- qdev_prop_set_bit(dev, "disable-direct-reg3-writes", has_pmu);
+ qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
qdev_init_nofail(dev);
}
--
2.17.1
- [Qemu-ppc] [PULL 02/25] ppc/pnv: introduce a new isa_create() operation to the chip model, (continued)
- [Qemu-ppc] [PULL 02/25] ppc/pnv: introduce a new isa_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 17/25] target/ppc: Add missing opcode for icbt on PPC440, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 16/25] ppc4xx_i2c: Implement directcntl register, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 13/25] fpu_helper.c: fix helper_fpscr_clrbit() function, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 12/25] spapr: remove unused spapr_irq routines, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 11/25] spapr: split the IRQ allocation sequence, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 23/25] spapr: Don't rewrite mmu capabilities in KVM mode, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 10/25] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 20/25] spapr: Use maximum page size capability to simplify memory backend checking, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 22/25] spapr: Limit available pagesizes to provide a consistent guest environment, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 25/25] mac_newworld: always enable disable_direct_reg3_writes for ADB machines,
David Gibson <=
- [Qemu-ppc] [PULL 15/25] ppc4xx_i2c: Remove unimplemented sdata and intr registers, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 24/25] mac_dbdma: only dump commands for debug enabled channels, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 04/25] spapr_cpu_core: migrate VPA related state, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 06/25] ppc/pnv: consolidate the creation of the ISA bus device tree, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 07/25] target/ppc: Allow cpu compatiblity checks based on type, not instance, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 19/25] spapr: Maximum (HPT) pagesize property, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 05/25] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 21/25] target/ppc: Add ppc_hash64_filter_pagesizes(), David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 18/25] pseries: Update SLOF firmware image to qemu-slof-20180621, David Gibson, 2018/06/22
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/25] ppc-for-3.0 queue 2018-06-22, no-reply, 2018/06/22