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[Qemu-ppc] [PULL 10/25] target/ppc: Add kvmppc_hpt_needs_host_contiguous
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 10/25] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper |
Date: |
Fri, 22 Jun 2018 20:35:13 +1000 |
KVM HV has a restriction that for HPT mode guests, guest pages must be hpa
contiguous as well as gpa contiguous. We have to account for that in
various places. We determine whether we're subject to this restriction
from the SMMU information exposed by KVM.
Planned cleanups to the way we handle this will require knowing whether
this restriction is in play in wider parts of the code. So, expose a
helper function which returns it.
This does mean some redundant calls to kvm_get_smmu_info(), but they'll go
away again with future cleanups.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
---
target/ppc/kvm.c | 17 +++++++++++++++--
target/ppc/kvm_ppc.h | 6 ++++++
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 5c0e313ca6..50b5d01432 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -406,9 +406,22 @@ target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu,
}
}
+bool kvmppc_hpt_needs_host_contiguous_pages(void)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
+ static struct kvm_ppc_smmu_info smmu_info;
+
+ if (!kvm_enabled()) {
+ return false;
+ }
+
+ kvm_get_smmu_info(cpu, &smmu_info);
+ return !!(smmu_info.flags & KVM_PPC_PAGE_SIZES_REAL);
+}
+
static bool kvm_valid_page_size(uint32_t flags, long rampgsize, uint32_t shift)
{
- if (!(flags & KVM_PPC_PAGE_SIZES_REAL)) {
+ if (!kvmppc_hpt_needs_host_contiguous_pages()) {
return true;
}
@@ -445,7 +458,7 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu)
/* If we have HV KVM, we need to forbid CI large pages if our
* host page size is smaller than 64K.
*/
- if (smmu_info.flags & KVM_PPC_PAGE_SIZES_REAL) {
+ if (kvmppc_hpt_needs_host_contiguous_pages()) {
if (getpagesize() >= 0x10000) {
cpu->hash64_opts->flags |= PPC_HASH64_CI_LARGEPAGE;
} else {
diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
index e2840e1d33..a7ddb8a5d6 100644
--- a/target/ppc/kvm_ppc.h
+++ b/target/ppc/kvm_ppc.h
@@ -70,6 +70,7 @@ int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong
flags, int shift);
int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift);
bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu);
+bool kvmppc_hpt_needs_host_contiguous_pages(void);
bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path);
#else
@@ -222,6 +223,11 @@ static inline uint64_t kvmppc_rma_size(uint64_t
current_size,
return ram_size;
}
+static inline bool kvmppc_hpt_needs_host_contiguous_pages(void)
+{
+ return false;
+}
+
static inline bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path)
{
return true;
--
2.17.1
- [Qemu-ppc] [PULL 03/25] spapr_cpu_core: migrate per-CPU data, (continued)
- [Qemu-ppc] [PULL 03/25] spapr_cpu_core: migrate per-CPU data, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 14/25] sm501: Fix hardware cursor color conversion, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 08/25] spapr: Compute effective capability values earlier, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 02/25] ppc/pnv: introduce a new isa_create() operation to the chip model, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 17/25] target/ppc: Add missing opcode for icbt on PPC440, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 16/25] ppc4xx_i2c: Implement directcntl register, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 13/25] fpu_helper.c: fix helper_fpscr_clrbit() function, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 12/25] spapr: remove unused spapr_irq routines, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 11/25] spapr: split the IRQ allocation sequence, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 23/25] spapr: Don't rewrite mmu capabilities in KVM mode, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 10/25] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper,
David Gibson <=
- [Qemu-ppc] [PULL 20/25] spapr: Use maximum page size capability to simplify memory backend checking, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 22/25] spapr: Limit available pagesizes to provide a consistent guest environment, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 25/25] mac_newworld: always enable disable_direct_reg3_writes for ADB machines, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 15/25] ppc4xx_i2c: Remove unimplemented sdata and intr registers, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 24/25] mac_dbdma: only dump commands for debug enabled channels, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 04/25] spapr_cpu_core: migrate VPA related state, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 06/25] ppc/pnv: consolidate the creation of the ISA bus device tree, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 07/25] target/ppc: Allow cpu compatiblity checks based on type, not instance, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 19/25] spapr: Maximum (HPT) pagesize property, David Gibson, 2018/06/22
- [Qemu-ppc] [PULL 05/25] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models, David Gibson, 2018/06/22