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[Qemu-ppc] [PULL 15/17] target/ppc: always set PPC_MEM_TLBIE in pre 2.8
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 15/17] target/ppc: always set PPC_MEM_TLBIE in pre 2.8 migration hack |
Date: |
Fri, 4 May 2018 15:59:28 +1000 |
From: Greg Kurz <address@hidden>
The pseries-2.7 and older machine types require CPUPPCState::insns_flags
to be strictly equal between source and destination. This checking is
abusive and breaks migration of KVM guests when the host CPU models
are different, even if they are compatible enough to allow the guest
to run transparently. This buggy behaviour was fixed for pseries-2.8
and we added some hacks to allow backward migration of older machine
types. These hacks assume that the CPU belongs to the POWER8 family,
which was true for most KVM based setup we cared about at the time.
But now POWER9 systems are coming, and backward migration of pre 2.8
guests running in POWER8 architected mode from a POWER9 host to a
POWER8 host is broken:
qemu-system-ppc64: error while loading state for instance 0x0 of device
'cpu'
qemu-system-ppc64: load of migration failed: Invalid argument
This happens because POWER9 doesn't set PPC_MEM_TLBIE in insns_flags,
while POWER8 does. Let's force PPC_MEM_TLBIE in the migration hack to
fix the issue. This is an acceptable hack because these old machine
types only support CPU models that do set PPC_MEM_TLBIE.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/machine.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/ppc/machine.c b/target/ppc/machine.c
index 3d6434a006..ba1b9e531f 100644
--- a/target/ppc/machine.c
+++ b/target/ppc/machine.c
@@ -212,6 +212,11 @@ static int cpu_pre_save(void *opaque)
;
cpu->mig_msr_mask = env->msr_mask & ~metamask;
cpu->mig_insns_flags = env->insns_flags & insns_compat_mask;
+ /* CPU models supported by old machines all have PPC_MEM_TLBIE,
+ * so we set it unconditionally to allow backward migration from
+ * a POWER9 host to a POWER8 host.
+ */
+ cpu->mig_insns_flags |= PPC_MEM_TLBIE;
cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2;
cpu->mig_nb_BATs = env->nb_BATs;
}
--
2.17.0
- [Qemu-ppc] [PULL 00/17] ppc-for-2.13 queue 20180504, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 01/17] target/ppc: return a nil HPT base address on sPAPR machines, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 02/17] target/ppc: add basic support for PTCR on POWER9, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 03/17] spapr: Remove support for explicitly allocated RMAs, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 05/17] spapr: Clean up rtas_start_cpu() & rtas_stop_self(), David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 07/17] spapr: Make a helper to set up cpu entry point state, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 11/17] spapr: Clean up handling of LPCR power-saving exit bits, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 15/17] target/ppc: always set PPC_MEM_TLBIE in pre 2.8 migration hack,
David Gibson <=
- [Qemu-ppc] [PULL 16/17] spapr: don't migrate "spapr_option_vector_ov5_cas" to pre 2.8 machines, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 04/17] target/ppc: Add ppc_store_lpcr() helper, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 17/17] spapr: don't advertise radix GTSE if max-compat-cpu < power9, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 14/17] mac_newworld: move wiring of macio IRQs to macio_newworld_realize(), David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 10/17] spapr: Move PAPR mode cpu setup fully to spapr code, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 12/17] uninorth: create new uninorth device, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 09/17] target/ppc: Delay initialization of LPCR_UPRT for secondary cpus, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 06/17] spapr: Remove unhelpful helpers from rtas_start_cpu(), David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 13/17] mac_newworld: remove pics IRQ array and wire up macio to OpenPIC directly, David Gibson, 2018/05/04
- [Qemu-ppc] [PULL 08/17] spapr: Clean up LPCR updates from hypercalls, David Gibson, 2018/05/04