Re: [Qemu-ppc] [Qemu-devel] [PATCH v3] target-ppc: Enable open-pic timers to count and generate interrupts

[G 3]

On Jun 18, 2017, at 4:36 PM, address@hidden wrote:

> G 3 <address@hidden> wrote on 06/18/2017 09:45:25 AM:
>
> > > > > From: Aaron Larson <address@hidden>
> > > > > To: address@hidden, address@hidden, address@hidden,
> > > > address@hidden, address@hidden
> > > > > Date: 06/05/2017 12:22 PM
> > > > > Subject: [PATCH v3] target-ppc: Enable open-pic timers to count  
> > > > > and
> > > > generate interrupts
> > > > > Previously QEMU open-pic implemented the 4 open-pic timers  
> > > > > including
> > > > > all timer registers, but the timers did not "count" or generate  
> > > > > any
> > > > > interrupts.  The patch makes the timers both count and generate
> > > > > interrupts.  The timer clock frequency is fixed at 25MHZ.
>
> G3> Does QEMU behave differently after this patch is implemented?
>
> If the open-pic timers are programmed, then QEMU behaves
> differently, otherwise there should be no difference.

I guess I should have asked what differences did you see in QEMU's  
behavior?