Re: [Qemu-ppc] [Qemu-devel] [PATCH v3] target-ppc: Enable open-pic timers to count and generate interrupts

[G 3]

On Jun 18, 2017, at 6:50 AM, address@hidden wrote:
> On Fri, Jun 16, 2017 at 11:31:02AM -0500, address@hidden wrote:
> > Aaron Larson <address@hidden> wrote on 06/05/2017 12:22:53 PM:
> >
> > > From: Aaron Larson <address@hidden>
> > > To: address@hidden, address@hidden, address@hidden,
> > address@hidden, address@hidden
> > > Date: 06/05/2017 12:22 PM
> > > Subject: [PATCH v3] target-ppc: Enable open-pic timers to count and
> > generate interrupts
> > > Previously QEMU open-pic implemented the 4 open-pic timers including
> > > all timer registers, but the timers did not "count" or generate any
> > > interrupts.  The patch makes the timers both count and generate
> > > interrupts.  The timer clock frequency is fixed at 25MHZ.
> >
> >
> > I haven't received any feedback on this patch, and I don't see a  
> > response
> > on the mailing list archive.  Did it get lost?

Does QEMU behave differently after this patch is implemented?