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Re: [Qemu-ppc] [PATCH v3] target-ppc: Enable open-pic timers to count an
From: |
alarson |
Subject: |
Re: [Qemu-ppc] [PATCH v3] target-ppc: Enable open-pic timers to count and generate interrupts |
Date: |
Fri, 16 Jun 2017 11:31:02 -0500 |
Aaron Larson <address@hidden> wrote on 06/05/2017 12:22:53 PM:
> From: Aaron Larson <address@hidden>
> To: address@hidden, address@hidden, address@hidden,
address@hidden, address@hidden
> Date: 06/05/2017 12:22 PM
> Subject: [PATCH v3] target-ppc: Enable open-pic timers to count and
generate interrupts
>
> Previously QEMU open-pic implemented the 4 open-pic timers including
> all timer registers, but the timers did not "count" or generate any
> interrupts. The patch makes the timers both count and generate
> interrupts. The timer clock frequency is fixed at 25MHZ.
>
> --
>
> Responding to V2 patch comments.
> - Simplify clock frequency logic and commentary.
> - Remove camelCase variables.
> - Timer objects now created at init rather than lazily.
>
> Signed-off-by: Aaron Larson <address@hidden>
I haven't received any feedback on this patch, and I don't see a response
on the mailing list archive. Did it get lost?