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[Qemu-ppc] [PULL 20/23] spapr: Don't accidentally advertise HTM support
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 20/23] spapr: Don't accidentally advertise HTM support on POWER9 |
Date: |
Thu, 11 May 2017 14:14:23 +1000 |
Logic in spapr_populate_pa_features() enables the bit advertising
Hardware Transactional Memory (HTM) in the guest's device tree only when
KVM advertises its availability with the KVM_CAP_PPC_HTM feature.
However, this assumes that the HTM bit is off in the base template used for
the device tree value. That is true for POWER8, but not for POWER9.
It looks like that was accidentally changed in 9fb4541 "spapr: Enable ISA
3.0 MMU mode selection via CAS".
Fixes: 9fb4541f5803f8d2ba116b12113386e26482ba30
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
---
hw/ppc/spapr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index e2dc77c..1b7cada 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -219,7 +219,7 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset,
/* 16: Vector */
0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
/* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
- 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 18 - 23 */
+ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
/* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
/* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
--
2.9.3
- [Qemu-ppc] [PULL 06/23] tcg: enable MTTCG by default for PPC64 on x86, (continued)
- [Qemu-ppc] [PULL 06/23] tcg: enable MTTCG by default for PPC64 on x86, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 10/23] Add QemuMacDrivers as submodule, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 21/23] target/ppc: Allow workarounds for POWER9 DD1, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 18/23] target/ppc: Enable RADIX mmu mode for pseries TCG guest, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 13/23] ppc: add qemu_vga.ndrv ROM to fw_cfg interface for NewWorld Macs, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 14/23] target/ppc: Set UPRT and GTSE on all cpus in H_REGISTER_PROCESS_TABLE, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 17/23] target/ppc: Implement ISA V3.00 radix page fault handler, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 15/23] target/ppc: Update tlbie to check privilege level based on GTSE, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 16/23] target/ppc: Change tlbie invalid fields for POWER9 support, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 07/23] target/ppc: do not reset reserve_addr in exec_enter, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 20/23] spapr: Don't accidentally advertise HTM support on POWER9,
David Gibson <=
- [Qemu-ppc] [PULL 22/23] pnv: Fix build failures on some host platforms, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 23/23] target/ppc: Avoid printing wrong aliases in CPU help text, David Gibson, 2017/05/11
- [Qemu-ppc] [PULL 11/23] Add QemuMacDrivers qemu_vga.ndrv revision d4e7d7a built as submodule, David Gibson, 2017/05/11
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/23] ppc-for-2.10 queue 20170511, Stefan Hajnoczi, 2017/05/15