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Re: [Qemu-ppc] [PATCH V5 0/9] target/ppc: Implement POWER9 pseries TCG l


From: David Gibson
Subject: Re: [Qemu-ppc] [PATCH V5 0/9] target/ppc: Implement POWER9 pseries TCG legacy support
Date: Thu, 2 Mar 2017 13:07:05 +1100
User-agent: Mutt/1.7.1 (2016-10-04)

On Wed, Mar 01, 2017 at 05:54:32PM +1100, Suraj Jitindar Singh wrote:
> This is V5 of the patch series to implement tcg emulation support for a
> POWER9 cpu model for the pseries machine type running a legacy kernel.
> That is a kernel which doesn't use the new radix mmu mode or the new hash
> mmu mode with segment tables.
> 
> To use a POWER9 cpu provide the command line option "-cpu POWER9".
> 
> This series attempts to avoid precluding KVM-HV support for the POWER9
> cpu model but doesn't attempt to support KVM-PR or the powernv machine
> for the POWER9 cpu model as these aren't currently supported or
> implemented and further code changes will be required in the event these
> are implemented.
> 
> This series is based on the hpt-cleanup branch.

Ok, I think I can squeeze this in for qemu-2.9, so I've merged it into
my ppc-for-2.9 tree (hpt-cleanup is already merged in there).

> 
> The changes from V4 are as follows:
> 
>  - Drop patch to remove ppc_hash64_set_sdr1()
> 
> The changes from V3 are as follows:
> 
>  - Add a flag POWERPC_MMU_V3 to mmu_model and check this where appropriate
>  - Add LPCR_HR define
>  - Remove function ppc_hash64_set_sdr1() and split this into new patch
>  - Add file mmu-book3s-v3.c to handle new ISAV3 generic mmu code
>  - Rebase on hpt-cleanup branch
> 
> Suraj Jitindar Singh (9):
>   target/ppc/POWER9: Add ISAv3.00 MMU definition
>   target/ppc/POWER9: Adapt LPCR handling for POWER9
>   target/ppc/POWER9: Direct all instr and data storage interrupts to the
>     hypv
>   target/ppc: Add patb_entry to sPAPRMachineState
>   target/ppc: Don't gen an SDR1 on POWER9 and rework register creation
>   target/ppc/POWER9: Add POWER9 mmu fault handler
>   target/ppc/POWER9: Add POWER9 pa-features definition
>   target/ppc/POWER9: Add cpu_has_work function for POWER9
>   hw/ppc/spapr: Add POWER9 to pseries cpu models
> 
>  hw/ppc/spapr.c              |  47 ++++++
>  hw/ppc/spapr_cpu_core.c     |   3 +
>  include/hw/ppc/spapr.h      |   1 +
>  target/ppc/Makefile.objs    |   2 +-
>  target/ppc/cpu-qom.h        |   7 +-
>  target/ppc/cpu.h            |  21 +++
>  target/ppc/mmu-book3s-v3.c  |  37 +++++
>  target/ppc/mmu-book3s-v3.h  |  50 ++++++
>  target/ppc/mmu-hash64.c     |  30 +++-
>  target/ppc/mmu_helper.c     |  17 ++
>  target/ppc/translate.c      |   7 +-
>  target/ppc/translate_init.c | 389 
> +++++++++++++++++++++++++++++---------------
>  12 files changed, 478 insertions(+), 133 deletions(-)
>  create mode 100644 target/ppc/mmu-book3s-v3.c
>  create mode 100644 target/ppc/mmu-book3s-v3.h
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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