Re: [Qemu-ppc] [PATCH v2 3/7] ppc/pnv: Add XSCOM infrastructure

[David Gibson]

On Wed, Sep 07, 2016 at 07:47:16AM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2016-09-06 at 16:42 +0200, Cédric Le Goater wrote:
> > 
> > The change does seem too invasive. I can give it a try in next
> > version.
> > 
> > When a memory region is triggered, the impacted device will have
> > to convert the address with xscom_to_pcb_addr(). There is some 
> > dependency on the chip model because the translation is different. 
> > That would be an extra op in the xscom device model I guess. 
> 
> No. If you split the XSCOM bus from the MMIO -> XSCOM bridge (the ADU)
> then the conversion only happens in the former. You don't directly
> route the MMIOs over ! You intercept the MMIOs and use use the
> address_space_rw to "generate" the XSCOM accesses on the other side,
> like I do for the LPC bus.

Oh.. wait.. that is what I had in mind, I think I misinterpreted
something one of you said.

> 
> We need that anyway because of the way XSCOMs can manipulate the HMER
> etc...
> 
> > Also, the main purpose of the XscomBus is to loop on the devices 
> > to populate the device tree. I am wondering if we could just use 
> > a simple list under the chip for that purpose.
> 
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

signature.asc
Description: PGP signature