Re: [Qemu-ppc] [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC

[Thomas Huth]

On 02.09.2016 08:43, Cédric Le Goater wrote:
> On 09/02/2016 08:32 AM, Nikunj A Dadhania wrote:
>> The series is a first attempt at enabling Multi-Threaded TCG on PowerPC.
>> Changes that were needed to enable PowerPC are pretty simple;
>>
>> Patch 01: Take a iothread lock during hcall, as hcall can generate io 
>> requests
>>       02: For TCG, we were harcoding smt as 1, this gets rid of the 
>> limitation
>>       03: Use atomic_cmpxchg in store conditional
>>       04: With more threads, flush the entry from each cpu. 
>>        This can be optimized further.
>>
>> The patches are based on the Alex Bennee's base enabling patches for 
>> MTTCG[1] and Emilios's cmpxchg atomics. The consolidated tree of the 
>> above patches is here:
>>
>> https://github.com/stsquad/qemu/tree/mttcg/base-patches-v4-with-cmpxchg-atomics-v2
>>
>> Apart from the above, PPC patches are based out of ppc-for-2.8 and 
>> load/store consolidation patches [2]
>>
>> Series with all dependent patches available here: 
>> https://github.com/nikunjad/qemu/tree/ppc_mttcg_v1
>>
>> Testing: 
>> ========
>>
>> -smp 4,cores=1,threads=4 -accel tcg,thread=multi
>>
>> TODO
>> ====
>> Implement msgsndp instructions(door-bell), newer kernels enable it 
>> depending on the PVR. I have been using following workaround to boot.
>> https://github.com/nikunjad/qemu/commit/2c10052c5f93418a6b920e6ba3ce1813fcf50bc4
> 
> You could also introduce a Power8 DD1 in qemu. From the kernel cputable :
> 
>       {       /* Power8 DD1: Does not support doorbell IPIs */
>               .pvr_mask               = 0xffffff00,
>               .pvr_value              = 0x004d0100,
>               .cpu_name               = "POWER8 (raw)",
>               .cpu_features           = CPU_FTRS_POWER8_DD1,
>               ...

Please try to avoid that! We just got rid of DD1 in qemu a couple of
months ago:

http://git.qemu.org/?p=qemu.git;a=commitdiff;h=9d6ba75df26d699a6

 Thomas