On Tue, May 10, 2016 at 09:18:13AM +0800, Li Zhong wrote:It seems that both ics_set_irq() and ics_kvm_set_irq() don't do anything useful for MSIs with val = 0, so maybe the pulse in spapr_msi_write() could be replaced with a single raise?
Signed-off-by: Li Zhong <address@hidden>
I'm not clear. Does the current code actually cause problems? Or areyou just suggesting a cleanup?
I think it’s some sort of cleanup, though my original intention was to save a function call and some condition checks in the code path. No real problems. I believe the convention in qemu is that edge or message triggered interrupts are tripped with qemu_irq_pulse().
After thinking more about the concept, and checking more code, I agree it is the convention to use the qemu_irq_pulse() to keep the “irq state” as lowered. However, as qemu_irq maintains the irq state through its handler, so it depends on the handler’s implementation whether a qemu_irq_lower() is needed?
Thanks, Zhong --- hw/ppc/spapr_pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 573e635..897c541 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -732,7 +732,7 @@ static void spapr_msi_write(void *opaque, hwaddr addr,
trace_spapr_pci_msi_write(addr, data, irq);
- qemu_irq_pulse(xics_get_qirq(spapr->icp, irq)); + qemu_irq_raise(xics_get_qirq(spapr->icp, irq)); }
static const MemoryRegionOps spapr_msi_ops = {
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