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[Qemu-ppc] [PULL 48/52] target-ppc: Clean up mullwo
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 48/52] target-ppc: Clean up mullwo |
Date: |
Thu, 4 Sep 2014 19:20:36 +0200 |
From: Tom Musta <address@hidden>
Simplify the implementation of mullwo. For 64 bit CPUs, the result is
the concatenation of the upper and lower parts of the muls2_i32 operation,
which may be slightly better than deposit. For 32 bit CPUs, the lower part
of the muls_i32 operation is moved into the target GPR.
Signed-off-by: Tom Musta <address@hidden>
Suggested-by: Richard Henderson <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ced295f..1062634 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1150,19 +1150,14 @@ static void gen_mullwo(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
TCGv_i32 t1 = tcg_temp_new_i32();
-#if defined(TARGET_PPC64)
- TCGv_i64 t2 = tcg_temp_new_i64();
-#endif
tcg_gen_trunc_tl_i32(t0, cpu_gpr[rA(ctx->opcode)]);
tcg_gen_trunc_tl_i32(t1, cpu_gpr[rB(ctx->opcode)]);
tcg_gen_muls2_i32(t0, t1, t0, t1);
- tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
#if defined(TARGET_PPC64)
- tcg_gen_ext_i32_tl(t2, t1);
- tcg_gen_deposit_i64(cpu_gpr[rD(ctx->opcode)],
- cpu_gpr[rD(ctx->opcode)], t2, 32, 32);
- tcg_temp_free(t2);
+ tcg_gen_concat_i32_i64(cpu_gpr[rD(ctx->opcode)], t0, t1);
+#else
+ tcg_gen_mov_i32(cpu_gpr[rD(ctx->opcode)], t0);
#endif
tcg_gen_sari_i32(t0, t0, 31);
--
1.8.1.4
- [Qemu-ppc] [PULL 35/52] PPC: KVM: Use vm check_extension for pv hcall, (continued)
- [Qemu-ppc] [PULL 35/52] PPC: KVM: Use vm check_extension for pv hcall, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 29/52] target-ppc: Bug Fix: mullwo, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 44/52] target-ppc: Special Case of rlwimi Should Use Deposit, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 36/52] PPC: mac99: Fix core99 timer frequency, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 31/52] target-ppc: Bug Fix: mulldo OV Detection, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 34/52] KVM: Add helper to run KVM_CHECK_EXTENSION on vm fd, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 28/52] target-ppc: Bug Fix: rlwimi, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 32/52] target-ppc: Bug Fix: srawi, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 43/52] spapr-vlan: Don't touch last entry in buffer list, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 42/52] spapr_pci: Fix config space corruption, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 48/52] target-ppc: Clean up mullwo,
Alexander Graf <=
- [Qemu-ppc] [PULL 39/52] PPC: mac_nvram: Split NVRAM into OF and OSX parts, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 46/52] target-ppc: Optimize rlwnm MB=0 ME=31, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 49/52] target-ppc: Implement mulldo with TCG, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 52/52] hypervisor property clashes with hypervisor node, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 45/52] target-ppc: Optimize rlwinm MB=0 ME=31, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 38/52] PPC: mac_nvram: Allow 2 and 4 byte accesses, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 41/52] PPC: Cuda: Use cuda timer to expose tbfreq to guest, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 47/52] target-ppc: Clean Up mullw, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 50/52] spapr_pci: map the MSI window in each PHB, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 40/52] PPC: Mac: Move tbfreq into local variable, Alexander Graf, 2014/09/04