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[Qemu-ppc] [PATCH 17/17] ppc: dump all 32 CR bits
From: |
Paolo Bonzini |
Subject: |
[Qemu-ppc] [PATCH 17/17] ppc: dump all 32 CR bits |
Date: |
Thu, 28 Aug 2014 19:15:13 +0200 |
This is more precise when bits have been modified with CR
boolean operations.
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-ppc/translate.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index dd19b39..35e7a8b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11087,18 +11087,14 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf,
for (i = 0; i < 8; i++) {
cpu_fprintf(f, "%01x", ppc_get_crf(env, i));
}
- cpu_fprintf(f, " [");
- for (i = 0; i < 8; i++) {
- char a = '-';
- if (ppc_get_crf(env, i) & 0x08)
- a = 'L';
- else if (ppc_get_crf(env, i) & 0x04)
- a = 'G';
- else if (ppc_get_crf(env, i) & 0x02)
- a = 'E';
- cpu_fprintf(f, " %c%c", a, ppc_get_crf(env, i) & 0x01 ? 'O' : ' ');
- }
- cpu_fprintf(f, " ] RES " TARGET_FMT_lx "\n",
+ cpu_fprintf(f, " ");
+ for (i = 0; i < 32; i++) {
+ if ((i & 3) == 0) {
+ cpu_fprintf(f, "%c", i ? ' ' : '[');
+ }
+ cpu_fprintf(f, "%c", env->cr[i] ? "LGEO"[i&3] : '.');
+ }
+ cpu_fprintf(f, "] RES " TARGET_FMT_lx "\n",
env->reserve_addr);
for (i = 0; i < 32; i++) {
if ((i & (RFPL - 1)) == 0)
--
1.8.3.1
- [Qemu-ppc] [PATCH 06/17] ppc: use CRF_* in int_helper.c, (continued)
- [Qemu-ppc] [PATCH 06/17] ppc: use CRF_* in int_helper.c, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 07/17] ppc: fix result of DLMZB when no zero bytes are found, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 08/17] ppc: introduce helpers for mfocrf/mtocrf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 09/17] ppc: reorganize gen_compute_fprf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 10/17] ppc: introduce gen_op_mfcr/gen_op_mtcr, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 11/17] ppc: rename gen_set_cr6_from_fpscr, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 14/17] ppc: introduce ppc_get_crf and ppc_set_crf, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 13/17] ppc: compute mask from BI using right shift, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 15/17] ppc: store CR registers in 32 1-bit registers, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 16/17] ppc: inline ppc_get_crf/ppc_set_crf when clearer, Paolo Bonzini, 2014/08/28
- [Qemu-ppc] [PATCH 17/17] ppc: dump all 32 CR bits,
Paolo Bonzini <=
- [Qemu-ppc] [PATCH 12/17] ppc: use movcond for isel, Paolo Bonzini, 2014/08/28
- Re: [Qemu-ppc] [RFT/RFH PATCH 00/16] PPC speedup patches for TCG, Tom Musta, 2014/08/28