Re: [Qemu-ppc] [PATCH v3 3/4] target-ppc: ppc can be either endian

[Peter Maydell]

On 7 May 2014 09:14, Greg Kurz <address@hidden> wrote:
> On Tue, 6 May 2014 19:37:22 +0100
> Peter Maydell <address@hidden> wrote:
>> On 5 May 2014 09:07, Greg Kurz <address@hidden> wrote:
>> > POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
>> > special purpose register to decide the endianness to use when
>> > entering interrupt handlers. When running a Linux guest, this
>> > provides a hint on the endianness used by the kernel. From a
>> > QEMU point of view, the information is needed for legacy virtio
>> > support and crash dump support as well.
>>
>> Do you care about the case of:
>>  * kernel bigendian
>
> Yes. FWIW, ppc64 is still widely used in big endian mode we don't
> want to break.
>
>>  * userspace littleendian (or vice-versa)
>
> We don't care about userspace here. We assume that virtio structures are
> owned by the guest kernel.
>
>>  * guest kernel passes virtio device through to guest userspace
>
> Not sure to understand... could you please point me to an example ?

Consider PCI passthrough of a virtio device to userspace Linux
or to a nested KVM/QEMU instance running inside the outermost
KVM. It's a bit of an odd corner case, but we should either accommodate
it or definitely say it's not expected to work consistently across
architectures I think.

thanks
-- PMM