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[Qemu-ppc] [PATCH 12/16] ppc: Correctly define POWERPC_INSNS2_DEFAULT
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 12/16] ppc: Correctly define POWERPC_INSNS2_DEFAULT |
Date: |
Thu, 15 Mar 2012 13:14:18 +0100 |
From: Meador Inge <address@hidden>
'POWERPC_INSNS2_DEFAULT' was defined incorrectly which was causing the
opcode table creation code to erroneously register 'eieio' and 'mbar'
for the "default" processor:
** ERROR: opcode 1a already assigned in opcode table 16
*** ERROR: unable to insert opcode [1f-16-1a]
*** ERROR initializing PowerPC instruction 0x1f 0x16 0x1a
Signed-off-by: Meador Inge <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate_init.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5a958b9..367eefa 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6718,7 +6718,7 @@ static void init_proc_620 (CPUPPCState *env)
#if defined (TARGET_PPC64) && 0 // XXX: TODO
#define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC64
#define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC64
-#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS_PPC64
+#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS2_PPC64
#define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC64
#define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC64
#define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC64
@@ -6730,7 +6730,7 @@ static void init_proc_620 (CPUPPCState *env)
#else
#define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32
#define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32
-#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS_PPC32
+#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS2_PPC32
#define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC32
#define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC32
#define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC32
--
1.6.0.2
- [Qemu-ppc] [PULL 00/16] ppc patch queue 2012-03-15, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 01/16] Bad zero comparison for sas_ss_flags on powerpc, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 03/16] ppc: Add missing 'static' to spin_rw_ops, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 02/16] PPC: 405: Fix ppc405ep initialization, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 13/16] kvm: Comparison with ioctl number macros needs to be unsigned, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 15/16] pseries: Configure PCI bridge using properties, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 08/16] pseries: Remove PCI device from PCI host bridge code, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 16/16] PPC: Fix openpic with relative memregions, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 09/16] PPC: Add PIR register to POWER7 CPU, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 12/16] ppc: Correctly define POWERPC_INSNS2_DEFAULT,
Alexander Graf <=
- [Qemu-ppc] [PATCH 11/16] pseries: Add support for level interrupts to XICS, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 04/16] pseries: Don't try to munmap() a malloc()ed TCE table, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 05/16] PPC64: Add support for ldbrx and stdbrx instructions, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 06/16] pseries: Update SLOF firmware image, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 07/16] pseries: Remove unused constant from PCI code, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 14/16] PPC: KVM: Synchronize regs on CPU dump, Alexander Graf, 2012/03/15
- [Qemu-ppc] [PATCH 10/16] PPC: Fix large page support in TCG, Alexander Graf, 2012/03/15
- Re: [Qemu-ppc] [PULL 00/16] ppc patch queue 2012-03-15, Blue Swirl, 2012/03/17