Re: [Qemu-ppc] Regression in ppc-softmmu when running HelenOS

[Mark Cave-Ayland]

On 12/03/12 19:33, Alexander Graf wrote:

> > (Cc: to helenos-devel@)
> >
> > I tried your patch with the latest HelenOS mainline. The user experience
> > seems the same compared to what you get with Qemu 0.11.1, meaning that
> > in both cases the clock seems to go too fast (could be a HelenOS bug),
> > but otherwise the system boots and runs fine.
>
> So we are losing an MSR bit. Please try to find out which one it is.

Hi Alex,

I can have a look at this and see if I can come up with something 
better. However I am a little confused by your original patch which 
looks something like this:


/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;

/* new interrupt handler msr */
new_msr = env->msr & ((target_ulong)1 << MSR_ME);
...
...
/* Save MSR */
env->spr[srr1] = msr;
...
env->msr = new_msr & env->msr_mask;


Based upon the logic at http://www.systemcomputing.org/ppc/ppc4.htm then 
it would imply that env->msr should be placed unaltered into srr1 and 
then the must-be-zero bits just masked out on new_msr? Or am I missing 
something here?


ATB,

Mark.