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Re: [PATCH v1 17/18] hw/arm/aspeed_ast27x0: Add HACE support for AST2700
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From: |
Andrew Jeffery |
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Subject: |
Re: [PATCH v1 17/18] hw/arm/aspeed_ast27x0: Add HACE support for AST2700 |
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Date: |
Thu, 30 Jan 2025 15:02:16 +1030 |
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User-agent: |
Evolution 3.46.4-2 |
On Tue, 2025-01-21 at 15:04 +0800, Jamin Lin wrote:
> The HACE controller between AST2600 and AST2700 are almost identical.
> The HACE controller registers base address starts at 0x1207_0000 and
> its alarm interrupt is connected to GICINT4.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
- Re: [PATCH v1 11/18] hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions, (continued)
- [PATCH v1 12/18] hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1, Jamin Lin, 2025/01/21
- [PATCH v1 13/18] hw/arm/aspeed: Rename IRQ table and machine name for AST2700 A0, Jamin Lin, 2025/01/21
- [PATCH v1 14/18] hw/arm/aspeed: Add SoC and Machine Support for AST2700 A1, Jamin Lin, 2025/01/21
- [PATCH v1 15/18] hw/misc/aspeed_hace: Fix coding style, Jamin Lin, 2025/01/21
- [PATCH v1 16/18] hw/misc/aspeed_hace: Add AST2700 support, Jamin Lin, 2025/01/21
- [PATCH v1 17/18] hw/arm/aspeed_ast27x0: Add HACE support for AST2700, Jamin Lin, 2025/01/21
- Re: [PATCH v1 17/18] hw/arm/aspeed_ast27x0: Add HACE support for AST2700,
Andrew Jeffery <=
- [PATCH v1 18/18] hw/misc/aspeed_hace: (DROP) Fix boot issue in the Crypto Manager Self Test(WORKAROUND), Jamin Lin, 2025/01/21
- Re: [PATCH v1 00/18] Support AST2700 A1, Cédric Le Goater, 2025/01/31