[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v7 46/52] i386/tdx: Mark the configurable bit not reported by KVM
From: |
Xiaoyao Li |
Subject: |
[PATCH v7 46/52] i386/tdx: Mark the configurable bit not reported by KVM as unsupported |
Date: |
Fri, 24 Jan 2025 08:20:42 -0500 |
There is no interface in KVM to report the support bits of TD guest.
QEMU has to maintain the knowledge itself. E.g., fixed0 and fixed1 are
already hardcoded in tdx_fixed0_bits and tdx_fixed1_bits.
For configurable bits, KVM might filer some due to KVM lacks the support
currently. The filtered bits need to be marked as unsupported as well.
However, there is no interface to report which configurable bit is
turned unconfigurable.
Maintain the configurable bits of TDX module in QEMU and compare with
KVM reported configurable to find the ones being turned unconfigurable
by KVM and mark them as unsupported.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/tdx.c | 61 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 60 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c
index b46e581bb40e..2b9a47020934 100644
--- a/target/i386/kvm/tdx.c
+++ b/target/i386/kvm/tdx.c
@@ -529,6 +529,50 @@ KvmCpuidInfo tdx_fixed1_bits = {
},
};
+/* TDX module 1.5.08.04.0784 on EMR */
+KvmCpuidInfo tdx_configurable_bits = {
+ .cpuid.nent = 6,
+ .entries[0] = {
+ .function = 0x1,
+ .index = 0,
+ .eax = 0x0fff3fff,
+ .ebx = 0x00ff0000,
+ .ecx = 0x31044988,
+ .edx = 0xb8400000,
+ },
+ .entries[1] = {
+ .function = 0x7,
+ .index = 0,
+ .flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX,
+ .ebx = 0xd02b9b18,
+ .ecx = 0x02417f64,
+ .edx = 0x00054010,
+ },
+ .entries[2] = {
+ .function = 0x7,
+ .index = 0x1,
+ .flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX,
+ .eax = 0x00001c30,
+ },
+ .entries[3] = {
+ .function = 0x7,
+ .index = 0x2,
+ .flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX,
+ .edx = 0x00000008,
+ },
+ .entries[4] = {
+ .function = 0x1c,
+ .index = 0x0,
+ .eax = 0x0000000b,
+ },
+ .entries[5] = {
+ .function = 0x80000008,
+ .index = 0,
+ .eax = 0x000000ff,
+ .ebx = 0x00000200,
+ },
+};
+
typedef struct TdxAttrsMap {
uint32_t attr_index;
uint32_t cpuid_leaf;
@@ -621,7 +665,7 @@ static uint32_t
tdx_adjust_cpuid_features(X86ConfidentialGuest *cg,
uint32_t feature, uint32_t index,
int reg, uint32_t value)
{
- struct kvm_cpuid_entry2 *e;
+ struct kvm_cpuid_entry2 *e, *e1;
uint32_t fixed0, fixed1;
switch (feature) {
@@ -653,6 +697,21 @@ static uint32_t
tdx_adjust_cpuid_features(X86ConfidentialGuest *cg,
tdx_mask_cpuid_by_attrs(feature, index, reg, &value);
tdx_mask_cpuid_by_xfam(feature, index, reg, &value);
+ e = cpuid_find_entry(&tdx_caps->cpuid, feature, index);
+ if (e) {
+ e1 = cpuid_find_entry(&tdx_configurable_bits.cpuid, feature, index);
+ if (e1) {
+ uint32_t kvm_configurable = cpuid_entry_get_reg(e, reg);
+ uint32_t tdx_module_configurable = cpuid_entry_get_reg(e1, reg);
+ for (int i = 0; i < 32; i++) {
+ uint32_t f = 1U << i;
+ if (f & tdx_module_configurable && !(f & kvm_configurable)) {
+ value &= ~f;
+ }
+ }
+ }
+ }
+
e = cpuid_find_entry(&tdx_fixed0_bits.cpuid, feature, index);
if (e) {
fixed0 = cpuid_entry_get_reg(e, reg);
--
2.34.1
- [PATCH v7 28/52] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility, (continued)
- [PATCH v7 28/52] i386/tdx: Wire TDX_REPORT_FATAL_ERROR with GuestPanic facility, Xiaoyao Li, 2025/01/24
- [PATCH v7 27/52] i386/tdx: Handle KVM_SYSTEM_EVENT_TDX_FATAL, Xiaoyao Li, 2025/01/24
- [PATCH v7 32/52] i386/tdx: Force exposing CPUID 0x1f, Xiaoyao Li, 2025/01/24
- [PATCH v7 34/52] i386/tdx: Disable SMM for TDX VMs, Xiaoyao Li, 2025/01/24
- [PATCH v7 39/52] cpu: Don't set vcpu_dirty when guest_state_protected, Xiaoyao Li, 2025/01/24
- [PATCH v7 42/52] i386/tdx: Apply TDX fixed0 and fixed1 information to supported CPUIDs, Xiaoyao Li, 2025/01/24
- [PATCH v7 41/52] i386/tdx: Implement adjust_cpuid_features() for TDX, Xiaoyao Li, 2025/01/24
- [PATCH v7 49/52] i386/tdx: Don't treat SYSCALL as unavailable, Xiaoyao Li, 2025/01/24
- [PATCH v7 43/52] i386/tdx: Mask off CPUID bits by unsupported TD Attributes, Xiaoyao Li, 2025/01/24
- [PATCH v7 44/52] i386/cpu: Move CPUID_XSTATE_XSS_MASK to header file and introduce CPUID_XSTATE_MASK, Xiaoyao Li, 2025/01/24
- [PATCH v7 46/52] i386/tdx: Mark the configurable bit not reported by KVM as unsupported,
Xiaoyao Li <=
- [PATCH v7 40/52] i386/cgs: Rename *mask_cpuid_features() to *adjust_cpuid_features(), Xiaoyao Li, 2025/01/24
- [PATCH v7 45/52] i386/tdx: Mask off CPUID bits by unsupported XFAM, Xiaoyao Li, 2025/01/24
- [PATCH v7 47/52] i386/cgs: Introduce x86_confidential_guest_check_features(), Xiaoyao Li, 2025/01/24
- [PATCH v7 50/52] i386/tdx: Make invtsc default on, Xiaoyao Li, 2025/01/24
- [PATCH v7 51/52] i386/tdx: Validate phys_bits against host value, Xiaoyao Li, 2025/01/24
- [PATCH v7 48/52] i386/tdx: Fetch and validate CPUID of TD guest, Xiaoyao Li, 2025/01/24
- [PATCH v7 52/52] docs: Add TDX documentation, Xiaoyao Li, 2025/01/24