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[PULL 05/48] target/i386: unify choice between single and repeated strin
From: |
Paolo Bonzini |
Subject: |
[PULL 05/48] target/i386: unify choice between single and repeated string instructions |
Date: |
Fri, 24 Jan 2025 10:43:59 +0100 |
The same "if" is present in all generator functions for string instructions.
Push it inside gen_repz() and gen_repz_nz() instead.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241215090613.89588-5-pbonzini@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/translate.c | 12 +++++++++--
target/i386/tcg/emit.c.inc | 42 +++++++------------------------------
2 files changed, 17 insertions(+), 37 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 877b5846114..3e46be8d78d 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -1341,13 +1341,21 @@ static void gen_repz(DisasContext *s, MemOp ot,
void (*fn)(DisasContext *s, MemOp ot))
{
- do_gen_rep(s, ot, fn, false);
+ if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+ do_gen_rep(s, ot, fn, false);
+ } else {
+ fn(s, ot);
+ }
}
static void gen_repz_nz(DisasContext *s, MemOp ot,
void (*fn)(DisasContext *s, MemOp ot))
{
- do_gen_rep(s, ot, fn, true);
+ if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+ do_gen_rep(s, ot, fn, true);
+ } else {
+ fn(s, ot);
+ }
}
static void gen_helper_fp_arith_ST0_FT0(int op)
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 861f0fb70f3..3a28b0cb31b 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -1743,11 +1743,7 @@ static void gen_CMPccXADD(DisasContext *s,
X86DecodedInsn *decode)
static void gen_CMPS(DisasContext *s, X86DecodedInsn *decode)
{
MemOp ot = decode->op[2].ot;
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz_nz(s, ot, gen_cmps);
- } else {
- gen_cmps(s, ot);
- }
+ gen_repz_nz(s, ot, gen_cmps);
}
static void gen_CMPXCHG(DisasContext *s, X86DecodedInsn *decode)
@@ -2238,11 +2234,7 @@ static void gen_INS(DisasContext *s, X86DecodedInsn
*decode)
}
translator_io_start(&s->base);
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz(s, ot, gen_ins);
- } else {
- gen_ins(s, ot);
- }
+ gen_repz(s, ot, gen_ins);
}
static void gen_INSERTQ_i(DisasContext *s, X86DecodedInsn *decode)
@@ -2426,11 +2418,7 @@ static void gen_LGS(DisasContext *s, X86DecodedInsn
*decode)
static void gen_LODS(DisasContext *s, X86DecodedInsn *decode)
{
MemOp ot = decode->op[1].ot;
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz(s, ot, gen_lods);
- } else {
- gen_lods(s, ot);
- }
+ gen_repz(s, ot, gen_lods);
}
static void gen_LOOP(DisasContext *s, X86DecodedInsn *decode)
@@ -2628,11 +2616,7 @@ static void gen_MOVq_dq(DisasContext *s, X86DecodedInsn
*decode)
static void gen_MOVS(DisasContext *s, X86DecodedInsn *decode)
{
MemOp ot = decode->op[2].ot;
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz(s, ot, gen_movs);
- } else {
- gen_movs(s, ot);
- }
+ gen_repz(s, ot, gen_movs);
}
static void gen_MUL(DisasContext *s, X86DecodedInsn *decode)
@@ -2794,11 +2778,7 @@ static void gen_OUTS(DisasContext *s, X86DecodedInsn
*decode)
}
translator_io_start(&s->base);
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz(s, ot, gen_outs);
- } else {
- gen_outs(s, ot);
- }
+ gen_repz(s, ot, gen_outs);
}
static void gen_PALIGNR(DisasContext *s, X86DecodedInsn *decode)
@@ -3879,11 +3859,7 @@ static void gen_SBB(DisasContext *s, X86DecodedInsn
*decode)
static void gen_SCAS(DisasContext *s, X86DecodedInsn *decode)
{
MemOp ot = decode->op[2].ot;
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz_nz(s, ot, gen_scas);
- } else {
- gen_scas(s, ot);
- }
+ gen_repz_nz(s, ot, gen_scas);
}
static void gen_SETcc(DisasContext *s, X86DecodedInsn *decode)
@@ -4089,11 +4065,7 @@ static void gen_STMXCSR(DisasContext *s, X86DecodedInsn
*decode)
static void gen_STOS(DisasContext *s, X86DecodedInsn *decode)
{
MemOp ot = decode->op[1].ot;
- if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
- gen_repz(s, ot, gen_stos);
- } else {
- gen_stos(s, ot);
- }
+ gen_repz(s, ot, gen_stos);
}
static void gen_SUB(DisasContext *s, X86DecodedInsn *decode)
--
2.48.1
- [PULL 00/48] i386, rust changes for 2024-01-24, Paolo Bonzini, 2025/01/24
- [PULL 01/48] rust: pl011: fix repr(C) for PL011Class, Paolo Bonzini, 2025/01/24
- [PULL 02/48] target/i386: inline gen_jcc into sole caller, Paolo Bonzini, 2025/01/24
- [PULL 03/48] target/i386: remove trailing 1 from gen_{j, cmov, set}cc1, Paolo Bonzini, 2025/01/24
- [PULL 05/48] target/i386: unify choice between single and repeated string instructions,
Paolo Bonzini <=
- [PULL 04/48] target/i386: unify REP and REPZ/REPNZ generation, Paolo Bonzini, 2025/01/24
- [PULL 06/48] target/i386: reorganize ops emitted by do_gen_rep, drop repz_opt, Paolo Bonzini, 2025/01/24
- [PULL 07/48] target/i386: tcg: move gen_set/reset_* earlier in the file, Paolo Bonzini, 2025/01/24
- [PULL 08/48] target/i386: fix RF handling for string instructions, Paolo Bonzini, 2025/01/24
- [PULL 09/48] target/i386: make cc_op handling more explicit for repeated string instructions., Paolo Bonzini, 2025/01/24
- [PULL 10/48] target/i386: do not use gen_op_jz_ecx for repeated string operations, Paolo Bonzini, 2025/01/24
- [PULL 14/48] target/i386: extract common bits of gen_repz/gen_repz_nz, Paolo Bonzini, 2025/01/24
- [PULL 11/48] target/i386: optimize CX handling in repeated string operations, Paolo Bonzini, 2025/01/24
- [PULL 12/48] target/i386: execute multiple REP/REPZ iterations without leaving TB, Paolo Bonzini, 2025/01/24
- [PULL 16/48] target/i386: Introduce SierraForest-v2 model, Paolo Bonzini, 2025/01/24