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[PULL 03/48] target/i386: remove trailing 1 from gen_{j, cmov, set}cc1
From: |
Paolo Bonzini |
Subject: |
[PULL 03/48] target/i386: remove trailing 1 from gen_{j, cmov, set}cc1 |
Date: |
Fri, 24 Jan 2025 10:43:57 +0100 |
This is not needed anymore now that gen_jcc has been eliminated
(merged into the similarly-named gen_Jcc, where the uppercase letter
gives away that it is an emission function).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Link: https://lore.kernel.org/r/20241215090613.89588-3-pbonzini@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/translate.c | 14 +++++++-------
target/i386/tcg/emit.c.inc | 10 +++++-----
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 3b68441a561..a2101b5615e 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -1148,7 +1148,7 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b,
TCGv reg)
return cc;
}
-static void gen_setcc1(DisasContext *s, int b, TCGv reg)
+static void gen_setcc(DisasContext *s, int b, TCGv reg)
{
CCPrepare cc = gen_prepare_cc(s, b, reg);
@@ -1170,12 +1170,12 @@ static void gen_setcc1(DisasContext *s, int b, TCGv reg)
static inline void gen_compute_eflags_c(DisasContext *s, TCGv reg)
{
- gen_setcc1(s, JCC_B << 1, reg);
+ gen_setcc(s, JCC_B << 1, reg);
}
/* generate a conditional jump to label 'l1' according to jump opcode
value 'b'. In the fast case, T0 is guaranteed not to be used. */
-static inline void gen_jcc1_noeob(DisasContext *s, int b, TCGLabel *l1)
+static inline void gen_jcc_noeob(DisasContext *s, int b, TCGLabel *l1)
{
CCPrepare cc = gen_prepare_cc(s, b, NULL);
@@ -1190,7 +1190,7 @@ static inline void gen_jcc1_noeob(DisasContext *s, int b,
TCGLabel *l1)
value 'b'. In the fast case, T0 is guaranteed not to be used.
One or both of the branches will call gen_jmp_rel, so ensure
cc_op is clean. */
-static inline void gen_jcc1(DisasContext *s, int b, TCGLabel *l1)
+static inline void gen_jcc(DisasContext *s, int b, TCGLabel *l1)
{
CCPrepare cc = gen_prepare_cc(s, b, NULL);
@@ -1337,7 +1337,7 @@ static void gen_repz_nz(DisasContext *s, MemOp ot,
l2 = gen_jz_ecx_string(s);
fn(s, ot);
gen_op_add_reg_im(s, s->aflag, R_ECX, -1);
- gen_jcc1(s, (JCC_Z << 1) | (nz ^ 1), l2);
+ gen_jcc(s, (JCC_Z << 1) | (nz ^ 1), l2);
if (s->repz_opt) {
gen_op_jz_ecx(s, l2);
}
@@ -1847,7 +1847,7 @@ static void gen_conditional_jump_labels(DisasContext *s,
target_long diff,
gen_jmp_rel(s, s->dflag, diff, 0);
}
-static void gen_cmovcc1(DisasContext *s, int b, TCGv dest, TCGv src)
+static void gen_cmovcc(DisasContext *s, int b, TCGv dest, TCGv src)
{
CCPrepare cc = gen_prepare_cc(s, b, NULL);
@@ -2856,7 +2856,7 @@ static void gen_x87(DisasContext *s, X86DecodedInsn
*decode)
}
op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1);
l1 = gen_new_label();
- gen_jcc1_noeob(s, op1, l1);
+ gen_jcc_noeob(s, op1, l1);
gen_helper_fmov_ST0_STN(tcg_env,
tcg_constant_i32(opreg));
gen_set_label(l1);
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index a193d32ca76..861f0fb70f3 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -1634,7 +1634,7 @@ static void gen_CMC(DisasContext *s, X86DecodedInsn
*decode)
static void gen_CMOVcc(DisasContext *s, X86DecodedInsn *decode)
{
- gen_cmovcc1(s, decode->b & 0xf, s->T0, s->T1);
+ gen_cmovcc(s, decode->b & 0xf, s->T0, s->T1);
}
static void gen_CMPccXADD(DisasContext *s, X86DecodedInsn *decode)
@@ -2300,7 +2300,7 @@ static void gen_Jcc(DisasContext *s, X86DecodedInsn
*decode)
TCGLabel *taken = gen_new_label();
gen_bnd_jmp(s);
- gen_jcc1(s, decode->b & 0xf, taken);
+ gen_jcc(s, decode->b & 0xf, taken);
gen_conditional_jump_labels(s, decode->immediate, NULL, taken);
}
@@ -2451,7 +2451,7 @@ static void gen_LOOPE(DisasContext *s, X86DecodedInsn
*decode)
gen_update_cc_op(s);
gen_op_add_reg_im(s, s->aflag, R_ECX, -1);
gen_op_jz_ecx(s, not_taken);
- gen_jcc1(s, (JCC_Z << 1), taken); /* jz taken */
+ gen_jcc(s, (JCC_Z << 1), taken); /* jz taken */
gen_conditional_jump_labels(s, decode->immediate, not_taken, taken);
}
@@ -2463,7 +2463,7 @@ static void gen_LOOPNE(DisasContext *s, X86DecodedInsn
*decode)
gen_update_cc_op(s);
gen_op_add_reg_im(s, s->aflag, R_ECX, -1);
gen_op_jz_ecx(s, not_taken);
- gen_jcc1(s, (JCC_Z << 1) | 1, taken); /* jnz taken */
+ gen_jcc(s, (JCC_Z << 1) | 1, taken); /* jnz taken */
gen_conditional_jump_labels(s, decode->immediate, not_taken, taken);
}
@@ -3888,7 +3888,7 @@ static void gen_SCAS(DisasContext *s, X86DecodedInsn
*decode)
static void gen_SETcc(DisasContext *s, X86DecodedInsn *decode)
{
- gen_setcc1(s, decode->b & 0xf, s->T0);
+ gen_setcc(s, decode->b & 0xf, s->T0);
}
static void gen_SFENCE(DisasContext *s, X86DecodedInsn *decode)
--
2.48.1
- [PULL 00/48] i386, rust changes for 2024-01-24, Paolo Bonzini, 2025/01/24
- [PULL 01/48] rust: pl011: fix repr(C) for PL011Class, Paolo Bonzini, 2025/01/24
- [PULL 02/48] target/i386: inline gen_jcc into sole caller, Paolo Bonzini, 2025/01/24
- [PULL 03/48] target/i386: remove trailing 1 from gen_{j, cmov, set}cc1,
Paolo Bonzini <=
- [PULL 05/48] target/i386: unify choice between single and repeated string instructions, Paolo Bonzini, 2025/01/24
- [PULL 04/48] target/i386: unify REP and REPZ/REPNZ generation, Paolo Bonzini, 2025/01/24
- [PULL 06/48] target/i386: reorganize ops emitted by do_gen_rep, drop repz_opt, Paolo Bonzini, 2025/01/24
- [PULL 07/48] target/i386: tcg: move gen_set/reset_* earlier in the file, Paolo Bonzini, 2025/01/24
- [PULL 08/48] target/i386: fix RF handling for string instructions, Paolo Bonzini, 2025/01/24
- [PULL 09/48] target/i386: make cc_op handling more explicit for repeated string instructions., Paolo Bonzini, 2025/01/24
- [PULL 10/48] target/i386: do not use gen_op_jz_ecx for repeated string operations, Paolo Bonzini, 2025/01/24
- [PULL 14/48] target/i386: extract common bits of gen_repz/gen_repz_nz, Paolo Bonzini, 2025/01/24
- [PULL 11/48] target/i386: optimize CX handling in repeated string operations, Paolo Bonzini, 2025/01/24
- [PULL 12/48] target/i386: execute multiple REP/REPZ iterations without leaving TB, Paolo Bonzini, 2025/01/24