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[PATCH 2/9] hw/sd/sdhci: Introduce a new Write Protected pin inverted pr
From: |
Cédric Le Goater |
Subject: |
[PATCH 2/9] hw/sd/sdhci: Introduce a new Write Protected pin inverted property |
Date: |
Wed, 22 Jan 2025 08:09:02 +0100 |
From: Jamin Lin <jamin_lin@aspeedtech.com>
The Write Protect pin of SDHCI model is default active low to match the SDHCI
spec. So, write enable the bit 19 should be 1 and write protected the bit 19
should be 0 at the Present State Register (0x24). However, some boards are
design Write Protected pin active high. In other words, write enable the bit 19
should be 0 and write protected the bit 19 should be 1 at the
Present State Register (0x24). To support it, introduces a new "wp-inverted"
property and set it false by default.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Acked-by: Cédric Le Goater <clg@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link:
https://lore.kernel.org/r/20241114094839.4128404-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/sd/sdhci.h | 5 +++++
hw/sd/sdhci.c | 6 ++++++
2 files changed, 11 insertions(+)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 6cd2822f1d13..38c08e285980 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -100,6 +100,11 @@ struct SDHCIState {
uint8_t sd_spec_version;
uint8_t uhs_mode;
uint8_t vendor; /* For vendor specific functionality */
+ /*
+ * Write Protect pin default active low for detecting SD card
+ * to be protected. Set wp_inverted to invert the signal.
+ */
+ bool wp_inverted;
};
typedef struct SDHCIState SDHCIState;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 318587ff57ca..99dd4a4e9528 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -274,6 +274,10 @@ static void sdhci_set_readonly(DeviceState *dev, bool
level)
{
SDHCIState *s = (SDHCIState *)dev;
+ if (s->wp_inverted) {
+ level = !level;
+ }
+
if (level) {
s->prnsts &= ~SDHC_WRITE_PROTECT;
} else {
@@ -1555,6 +1559,8 @@ static const Property sdhci_sysbus_properties[] = {
false),
DEFINE_PROP_LINK("dma", SDHCIState,
dma_mr, TYPE_MEMORY_REGION, MemoryRegion *),
+ DEFINE_PROP_BOOL("wp-inverted", SDHCIState,
+ wp_inverted, false),
};
static void sdhci_sysbus_init(Object *obj)
--
2.48.1
- [PATCH 0/9] aspeed: pre-PR for QEMU 10.0 (RESEND), Cédric Le Goater, 2025/01/22
- [PATCH 1/9] hw/arm/aspeed: fix connect_serial_hds_to_uarts, Cédric Le Goater, 2025/01/22
- [PATCH 2/9] hw/sd/sdhci: Introduce a new Write Protected pin inverted property,
Cédric Le Goater <=
- [PATCH 3/9] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB, Cédric Le Goater, 2025/01/22
- [PATCH 5/9] hw/timer/aspeed: Add AST2700 Support, Cédric Le Goater, 2025/01/22
- [PATCH 4/9] hw/timer/aspeed: Refactor Timer Callbacks for SoC-Specific Implementations, Cédric Le Goater, 2025/01/22
- [PATCH 6/9] aspeed/soc: Support Timer for AST2700, Cédric Le Goater, 2025/01/22
- [PATCH 8/9] test/functional: Update buildroot images to 2024.11, Cédric Le Goater, 2025/01/22
- [PATCH 7/9] test/functional: Update the Aspeed aarch64 test, Cédric Le Goater, 2025/01/22
- [PATCH 9/9] aspeed: Create sd devices only when defaults are enabled, Cédric Le Goater, 2025/01/22