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[PULL 46/48] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entr
From: |
Michael S. Tsirkin |
Subject: |
[PULL 46/48] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr` |
Date: |
Wed, 15 Jan 2025 13:10:55 -0500 |
From: Li Zhijian <lizhijian@fujitsu.com>
This assertion always happens when we sanitize the CXL memory device.
$ echo 1 > /sys/bus/cxl/devices/mem0/security/sanitize
It is incorrect to register an MSIX number beyond the device's capability.
Increase the device's MSIX number to cover the mailbox msix number(9).
Fixes: 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background
completion")
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-Id: <20250115075834.167504-1-lizhijian@fujitsu.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/mem/cxl_type3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index bd7652740f..0ae1704a34 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -843,7 +843,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
ComponentRegisters *regs = &cxl_cstate->crb;
MemoryRegion *mr = ®s->component_registers;
uint8_t *pci_conf = pci_dev->config;
- unsigned short msix_num = 6;
+ unsigned short msix_num = 10;
int i, rc;
uint16_t count;
--
MST
- [PULL 14/48] intel_iommu: Set accessed and dirty bits during stage-1 translation, (continued)
- [PULL 14/48] intel_iommu: Set accessed and dirty bits during stage-1 translation, Michael S. Tsirkin, 2025/01/15
- [PULL 18/48] intel_iommu: Add support for PASID-based device IOTLB invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 33/48] acpi/ghes: Change the type for source_id, Michael S. Tsirkin, 2025/01/15
- [PULL 32/48] acpi/ghes: Remove a duplicated out of bounds check, Michael S. Tsirkin, 2025/01/15
- [PULL 15/48] intel_iommu: Flush stage-1 cache in iotlb invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 16/48] intel_iommu: Process PASID-based iotlb invalidation, Michael S. Tsirkin, 2025/01/15
- [PULL 40/48] acpi/ghes: move offset calculus to a separate function, Michael S. Tsirkin, 2025/01/15
- [PULL 21/48] intel_iommu: Set default aw_bits to 48 starting from QEMU 9.2, Michael S. Tsirkin, 2025/01/15
- [PULL 22/48] tests/acpi: q35: Update host address width in DMAR, Michael S. Tsirkin, 2025/01/15
- [PULL 41/48] acpi/ghes: Change ghes fill logic to work with only one source, Michael S. Tsirkin, 2025/01/15
- [PULL 46/48] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr`,
Michael S. Tsirkin <=
- [PULL 28/48] acpi/ghes: simplify acpi_ghes_record_errors() code, Michael S. Tsirkin, 2025/01/15
- [PULL 25/48] tests/qtest: Add intel-iommu test, Michael S. Tsirkin, 2025/01/15
- [PULL 37/48] acpi/ghes: don't crash QEMU if ghes GED is not found, Michael S. Tsirkin, 2025/01/15
- [PULL 30/48] acpi/ghes: better handle source_id and notification, Michael S. Tsirkin, 2025/01/15
- [PULL 44/48] pci: acpi: Windows 'PCI Label Id' bug workaround, Michael S. Tsirkin, 2025/01/15
- [PULL 48/48] virtio-net: vhost-user: Implement internal migration, Michael S. Tsirkin, 2025/01/15
- [PULL 36/48] acpi/ghes: better name GHES memory error function, Michael S. Tsirkin, 2025/01/15
- [PULL 35/48] acpi/ghes: make the GHES record generation more generic, Michael S. Tsirkin, 2025/01/15
- [PULL 39/48] acpi/ghes: better name the offset of the hardware error firmware, Michael S. Tsirkin, 2025/01/15
- [PULL 38/48] acpi/ghes: rename etc/hardware_error file macros, Michael S. Tsirkin, 2025/01/15