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[PATCH v3] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entrie
From: |
Li Zhijian |
Subject: |
[PATCH v3] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr` |
Date: |
Wed, 15 Jan 2025 15:58:34 +0800 |
This assertion always happens when we sanitize the CXL memory device.
$ echo 1 > /sys/bus/cxl/devices/mem0/security/sanitize
It is incorrect to register an MSIX number beyond the device's capability.
Increase the device's MSIX number to cover the mailbox msix number(9).
Fixes: 43efb0bfad2b ("hw/cxl/mbox: Wire up interrupts for background
completion")
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
---
V3:
Just increate the device's msix number, A new enumeration will be introduced
in later patch. # Jonathan
V2:
Just increase msix number and add enum to maintainer their values # Jonathan
---
hw/mem/cxl_type3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index bd7652740f4b..0ae1704a345c 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -843,7 +843,7 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
ComponentRegisters *regs = &cxl_cstate->crb;
MemoryRegion *mr = ®s->component_registers;
uint8_t *pci_conf = pci_dev->config;
- unsigned short msix_num = 6;
+ unsigned short msix_num = 10;
int i, rc;
uint16_t count;
--
2.47.0
- [PATCH v3] hw/cxl: Fix msix_notify: Assertion `vector < dev->msix_entries_nr`,
Li Zhijian <=