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[PATCH v2 44/81] tcg/sparc64: Use SRA, SRL for {s}extract_i64
From: |
Richard Henderson |
Subject: |
[PATCH v2 44/81] tcg/sparc64: Use SRA, SRL for {s}extract_i64 |
Date: |
Tue, 7 Jan 2025 00:00:35 -0800 |
Extracts which abut bit 32 may use 32-bit shifts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/sparc64/tcg-target-has.h | 9 +++++++--
tcg/sparc64/tcg-target.c.inc | 11 +++++++++++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/tcg/sparc64/tcg-target-has.h b/tcg/sparc64/tcg-target-has.h
index d9ca14cc3d..2db461efed 100644
--- a/tcg/sparc64/tcg-target-has.h
+++ b/tcg/sparc64/tcg-target-has.h
@@ -68,8 +68,8 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_ctz_i64 0
#define TCG_TARGET_HAS_ctpop_i64 0
#define TCG_TARGET_HAS_deposit_i64 0
-#define TCG_TARGET_HAS_extract_i64 0
-#define TCG_TARGET_HAS_sextract_i64 0
+#define TCG_TARGET_HAS_extract_i64 1
+#define TCG_TARGET_HAS_sextract_i64 1
#define TCG_TARGET_HAS_extract2_i64 0
#define TCG_TARGET_HAS_negsetcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1
@@ -83,4 +83,9 @@ extern bool use_vis3_instructions;
#define TCG_TARGET_HAS_tst 1
+#define TCG_TARGET_extract_valid(type, ofs, len) \
+ ((type) == TCG_TYPE_I64 && (ofs) + (len) == 32)
+
+#define TCG_TARGET_sextract_valid TCG_TARGET_extract_valid
+
#endif
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index afc778fae7..733cb51651 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -1510,6 +1510,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
TCGType type,
tcg_out_mb(s, a0);
break;
+ case INDEX_op_extract_i64:
+ tcg_debug_assert(a2 + args[3] == 32);
+ tcg_out_arithi(s, a0, a1, a2, SHIFT_SRL);
+ break;
+ case INDEX_op_sextract_i64:
+ tcg_debug_assert(a2 + args[3] == 32);
+ tcg_out_arithi(s, a0, a1, a2, SHIFT_SRA);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
case INDEX_op_call: /* Always emitted via tcg_out_call. */
@@ -1559,6 +1568,8 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned
flags)
case INDEX_op_ext32u_i64:
case INDEX_op_ext_i32_i64:
case INDEX_op_extu_i32_i64:
+ case INDEX_op_extract_i64:
+ case INDEX_op_sextract_i64:
case INDEX_op_qemu_ld_a32_i32:
case INDEX_op_qemu_ld_a64_i32:
case INDEX_op_qemu_ld_a32_i64:
--
2.43.0
- Re: [PATCH v2 39/81] tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract, (continued)
- [PATCH v2 41/81] tcg/riscv64: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/07
- [PATCH v2 56/81] tcg/optimize: Fold andc with immediate to and, Richard Henderson, 2025/01/07
- [PATCH v2 55/81] tcg: Merge INDEX_op_and_{i32,i64}, Richard Henderson, 2025/01/07
- [PATCH v2 47/81] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}, Richard Henderson, 2025/01/07
- [PATCH v2 44/81] tcg/sparc64: Use SRA, SRL for {s}extract_i64,
Richard Henderson <=
- [PATCH v2 48/81] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}, Richard Henderson, 2025/01/07
- [PATCH v2 59/81] tcg: Merge INDEX_op_andc_{i32,i64}, Richard Henderson, 2025/01/07
- [PATCH v2 58/81] tcg: Convert andc to TCGOutOpBinary, Richard Henderson, 2025/01/07
- [PATCH v2 42/81] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64, Richard Henderson, 2025/01/07