[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 40/73] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extra
From: |
Richard Henderson |
Subject: |
[PATCH 40/73] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract |
Date: |
Thu, 2 Jan 2025 10:06:20 -0800 |
Accept byte and word extensions with the extract opcodes.
This is preparatory to removing the specialized extracts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target-has.h | 22 ++++++++++++++++++++--
tcg/s390x/tcg-target.c.inc | 37 +++++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/tcg/s390x/tcg-target-has.h b/tcg/s390x/tcg-target-has.h
index 93f1a67bd1..075ce5c15c 100644
--- a/tcg/s390x/tcg-target-has.h
+++ b/tcg/s390x/tcg-target-has.h
@@ -57,7 +57,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_ext16u_i32 1
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_extract_i32 1
-#define TCG_TARGET_HAS_sextract_i32 0
+#define TCG_TARGET_HAS_sextract_i32 1
#define TCG_TARGET_HAS_extract2_i32 0
#define TCG_TARGET_HAS_extr_i64_i32 0
#define TCG_TARGET_HAS_qemu_st8_i32 0
@@ -70,7 +70,7 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_ext32u_i64 1
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_extract_i64 1
-#define TCG_TARGET_HAS_sextract_i64 0
+#define TCG_TARGET_HAS_sextract_i64 1
#define TCG_TARGET_HAS_extract2_i64 0
#define TCG_TARGET_HAS_qemu_ldst_i128 1
@@ -96,4 +96,22 @@ extern uint64_t s390_facilities[3];
#define TCG_TARGET_HAS_cmpsel_vec 1
#define TCG_TARGET_HAS_tst_vec 0
+#define TCG_TARGET_extract_valid(type, ofs, len) 1
+
+static inline bool
+tcg_target_sextract_valid(TCGType type, unsigned ofs, unsigned len)
+{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ case 16:
+ return true;
+ case 32:
+ return type == TCG_TYPE_I64;
+ }
+ }
+ return false;
+}
+#define TCG_TARGET_sextract_valid tcg_target_sextract_valid
+
#endif
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index db8dec845b..633b4efb66 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1572,9 +1572,41 @@ static void tgen_deposit(TCGContext *s, TCGReg dest,
TCGReg src,
static void tgen_extract(TCGContext *s, TCGReg dest, TCGReg src,
int ofs, int len)
{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ tcg_out_ext8u(s, dest, src);
+ return;
+ case 16:
+ tcg_out_ext16u(s, dest, src);
+ return;
+ case 32:
+ tcg_out_ext32u(s, dest, src);
+ return;
+ }
+ }
tcg_out_risbg(s, dest, src, 64 - len, 63, 64 - ofs, 1);
}
+static void tgen_sextract(TCGContext *s, TCGReg dest, TCGReg src,
+ int ofs, int len)
+{
+ if (ofs == 0) {
+ switch (len) {
+ case 8:
+ tcg_out_ext8s(s, TCG_TYPE_REG, dest, src);
+ return;
+ case 16:
+ tcg_out_ext16s(s, TCG_TYPE_REG, dest, src);
+ return;
+ case 32:
+ tcg_out_ext32s(s, dest, src);
+ return;
+ }
+ }
+ g_assert_not_reached();
+}
+
static void tgen_gotoi(TCGContext *s, int cc, const tcg_insn_unit *dest)
{
ptrdiff_t off = tcg_pcrel_diff(s, dest) >> 1;
@@ -2727,6 +2759,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
OP_32_64(extract):
tgen_extract(s, args[0], args[1], args[2], args[3]);
break;
+ OP_32_64(sextract):
+ tgen_sextract(s, args[0], args[1], args[2], args[3]);
+ break;
case INDEX_op_clz_i64:
tgen_clz(s, args[0], args[1], args[2], const_args[2]);
@@ -3325,6 +3360,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_extu_i32_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
+ case INDEX_op_sextract_i32:
+ case INDEX_op_sextract_i64:
case INDEX_op_ctpop_i32:
case INDEX_op_ctpop_i64:
return C_O1_I1(r, r);
--
2.43.0
- [PATCH 12/73] target/i386: Remove TCG_TARGET_extract_tl_valid, (continued)
- [PATCH 12/73] target/i386: Remove TCG_TARGET_extract_tl_valid, Richard Henderson, 2025/01/02
- [PATCH 30/73] tcg/i386: Handle all 8-bit extensions for i686, Richard Henderson, 2025/01/02
- [PATCH 25/73] tcg: Merge TCG_TARGET_HAS_rot_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 26/73] tcg: Merge TCG_TARGET_HAS_{clz,ctz,ctpop}, Richard Henderson, 2025/01/02
- [PATCH 29/73] tcg: Merge TCG_TARGET_HAS_negsetcond_{i32,i64}, Richard Henderson, 2025/01/02
- [PATCH 34/73] tcg/arm: Add full [US]XT[BH] into {s}extract, Richard Henderson, 2025/01/02
- [PATCH 36/73] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract, Richard Henderson, 2025/01/02
- [PATCH 39/73] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64, Richard Henderson, 2025/01/02
- [PATCH 40/73] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract,
Richard Henderson <=
- [PATCH 52/73] tcg: Use tcg_op_supported in process_op_defs, Richard Henderson, 2025/01/02
- [PATCH 57/73] tcg: Add TCGType argument to tcg_out_op, Richard Henderson, 2025/01/02
- [PATCH 55/73] tcg: Merge INDEX_op_{ld,st}*_{i32_i64}, Richard Henderson, 2025/01/02
- [PATCH 58/73] tcg/optimize: Remove OptContext.type, Richard Henderson, 2025/01/02
- [PATCH 67/73] tcg: Merge extract, sextract operations, Richard Henderson, 2025/01/02
- [PATCH 41/73] tcg/sparc64: Use SRA, SRL for {s}extract_i64, Richard Henderson, 2025/01/02
- [PATCH 42/73] tcg/tci: Provide TCG_TARGET_{s}extract_valid, Richard Henderson, 2025/01/02
- [PATCH 50/73] tcg: Remove args_ct from TCGOpDef, Richard Henderson, 2025/01/02
- [PATCH 47/73] tcg: Make INDEX_op_extrh_i64_i32 mandatory, Richard Henderson, 2025/01/02