[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 14/21] hw/dmax/xlnx_dpdma: fix handling of address_extension descr
From: |
Peter Maydell |
Subject: |
[PULL 14/21] hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields |
Date: |
Tue, 30 Apr 2024 17:48:35 +0100 |
From: Alexandra Diupina <adiupina@astralinux.ru>
The DMA descriptor structures for this device have
a set of "address extension" fields which extend the 32
bit source addresses with an extra 16 bits to give a
48 bit address:
https://docs.amd.com/r/en-US/ug1085-zynq-ultrascale-trm/ADDR_EXT-Field
However, we misimplemented this address extension in several ways:
* we only extracted 12 bits of the extension fields, not 16
* we didn't shift the extension field up far enough
* we accidentally did the shift as 32-bit arithmetic, which
meant that we would have an overflow instead of setting
bits [47:32] of the resulting 64-bit address
Add a type cast and use extract64() instead of extract32()
to avoid integer overflow on addition. Fix bit fields
extraction according to documentation.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Cc: qemu-stable@nongnu.org
Fixes: d3c6369a96 ("introduce xlnx-dpdma")
Signed-off-by: Alexandra Diupina <adiupina@astralinux.ru>
Message-id: 20240428181131.23801-1-adiupina@astralinux.ru
[PMM: adjusted commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/dma/xlnx_dpdma.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/dma/xlnx_dpdma.c b/hw/dma/xlnx_dpdma.c
index 1f5cd64ed10..530717d1885 100644
--- a/hw/dma/xlnx_dpdma.c
+++ b/hw/dma/xlnx_dpdma.c
@@ -175,24 +175,24 @@ static uint64_t
xlnx_dpdma_desc_get_source_address(DPDMADescriptor *desc,
switch (frag) {
case 0:
- addr = desc->source_address
- + (extract32(desc->address_extension, 16, 12) << 20);
+ addr = (uint64_t)desc->source_address
+ + (extract64(desc->address_extension, 16, 16) << 32);
break;
case 1:
- addr = desc->source_address2
- + (extract32(desc->address_extension_23, 0, 12) << 8);
+ addr = (uint64_t)desc->source_address2
+ + (extract64(desc->address_extension_23, 0, 16) << 32);
break;
case 2:
- addr = desc->source_address3
- + (extract32(desc->address_extension_23, 16, 12) << 20);
+ addr = (uint64_t)desc->source_address3
+ + (extract64(desc->address_extension_23, 16, 16) << 32);
break;
case 3:
- addr = desc->source_address4
- + (extract32(desc->address_extension_45, 0, 12) << 8);
+ addr = (uint64_t)desc->source_address4
+ + (extract64(desc->address_extension_45, 0, 16) << 32);
break;
case 4:
- addr = desc->source_address5
- + (extract32(desc->address_extension_45, 16, 12) << 20);
+ addr = (uint64_t)desc->source_address5
+ + (extract64(desc->address_extension_45, 16, 16) << 32);
break;
default:
addr = 0;
--
2.34.1
- [PULL 01/21] hw/core/clock: allow clock_propagate on child clocks, (continued)
- [PULL 01/21] hw/core/clock: allow clock_propagate on child clocks, Peter Maydell, 2024/04/30
- [PULL 04/21] docs/system/arm/emulation.rst: Add missing implemented features, Peter Maydell, 2024/04/30
- [PULL 09/21] tests/avocado: update sunxi kernel from armbian to 6.6.16, Peter Maydell, 2024/04/30
- [PULL 11/21] hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz, Peter Maydell, 2024/04/30
- [PULL 12/21] hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property, Peter Maydell, 2024/04/30
- [PULL 10/21] target/arm: Refactor default generic timer frequency handling, Peter Maydell, 2024/04/30
- [PULL 07/21] target/arm: Implement ID_AA64MMFR3_EL1, Peter Maydell, 2024/04/30
- [PULL 16/21] hw/arm/npcm7xx: Store derivative OTP fuse key in little endian, Peter Maydell, 2024/04/30
- [PULL 18/21] hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC, Peter Maydell, 2024/04/30
- [PULL 19/21] hw/arm : Create Bl475eMachineState, Peter Maydell, 2024/04/30
- [PULL 14/21] hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields,
Peter Maydell <=
- [PULL 13/21] target/arm: Default to 1GHz cntfrq for 'max' and new CPUs, Peter Maydell, 2024/04/30
- [PULL 20/21] hw/arm : Connect DM163 to B-L475E-IOT01A, Peter Maydell, 2024/04/30
- [PULL 17/21] hw/display : Add device DM163, Peter Maydell, 2024/04/30
- [PULL 21/21] tests/qtest : Add testcase for DM163, Peter Maydell, 2024/04/30
- [PULL 15/21] hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size, Peter Maydell, 2024/04/30
- Re: [PULL 00/21] target-arm queue, Richard Henderson, 2024/04/30