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Re: [PATCH] target/ppc/mmu-radix64: Use correct string format in walk_tr
From: |
Nicholas Piggin |
Subject: |
Re: [PATCH] target/ppc/mmu-radix64: Use correct string format in walk_tree() |
Date: |
Wed, 20 Mar 2024 15:02:04 +1000 |
Thanks, I can put this in the ppc tree.
Thanks,
Nick
On Tue Mar 19, 2024 at 4:30 PM AEST, Philippe Mathieu-Daudé wrote:
> +Anton
>
> On 19/3/24 06:10, Philippe Mathieu-Daudé wrote:
> > 'mask', 'nlb' and 'base_addr' are all uin64_t types.
> > Use the corresponding PRIx64 format.
> >
> > Fixes: d2066bc50d ("target/ppc: Check page dir/table base alignment")
> > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> > ---
> > target/ppc/mmu-radix64.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
> > index 5823e039e6..690dff7a49 100644
> > --- a/target/ppc/mmu-radix64.c
> > +++ b/target/ppc/mmu-radix64.c
> > @@ -300,8 +300,8 @@ static int ppc_radix64_next_level(AddressSpace *as,
> > vaddr eaddr,
> >
> > if (nlb & mask) {
> > qemu_log_mask(LOG_GUEST_ERROR,
> > - "%s: misaligned page dir/table base: 0x"TARGET_FMT_lx
> > - " page dir size: 0x"TARGET_FMT_lx"\n",
> > + "%s: misaligned page dir/table base: 0x%" PRIx64
> > + " page dir size: 0x%" PRIx64 "\n",
> > __func__, nlb, mask + 1);
> > nlb &= ~mask;
> > }
> > @@ -324,8 +324,8 @@ static int ppc_radix64_walk_tree(AddressSpace *as,
> > vaddr eaddr,
> >
> > if (base_addr & mask) {
> > qemu_log_mask(LOG_GUEST_ERROR,
> > - "%s: misaligned page dir base: 0x"TARGET_FMT_lx
> > - " page dir size: 0x"TARGET_FMT_lx"\n",
> > + "%s: misaligned page dir base: 0x%" PRIx64
> > + " page dir size: 0x%" PRIx64 "\n",
> > __func__, base_addr, mask + 1);
> > base_addr &= ~mask;
> > }