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[PATCH v2 6/6] target/hppa: fix do_stdby_e()
From: |
Sven Schnelle |
Subject: |
[PATCH v2 6/6] target/hppa: fix do_stdby_e() |
Date: |
Tue, 19 Mar 2024 17:19:21 +0100 |
stdby,e,m was writing data from the wrong half of the register
into memory for cases 0-3.
Fixes: 25460fc5a71 ("target/hppa: Implement STDBY")
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/op_helper.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 480fe80844..6cf49f33b7 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -281,17 +281,17 @@ static void do_stdby_e(CPUHPPAState *env, target_ulong
addr, uint64_t val,
case 3:
/* The 3 byte store must appear atomic. */
if (parallel) {
- atomic_store_mask32(env, addr - 3, val, 0xffffff00u, ra);
+ atomic_store_mask32(env, addr - 3, val >> 32, 0xffffff00u, ra);
} else {
- cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
- cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
+ cpu_stw_data_ra(env, addr - 3, val >> 48, ra);
+ cpu_stb_data_ra(env, addr - 1, val >> 40, ra);
}
break;
case 2:
- cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
+ cpu_stw_data_ra(env, addr - 2, val >> 48, ra);
break;
case 1:
- cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
+ cpu_stb_data_ra(env, addr - 1, val >> 56, ra);
break;
default:
/* Nothing is stored, but protection is checked and the
--
2.43.2
- [PATCH v2 0/6] few fixes for hppa target, Sven Schnelle, 2024/03/19
- [PATCH v2 1/6] target/hppa: ldcw,s uses static shift of 3, Sven Schnelle, 2024/03/19
- [PATCH v2 2/6] target/hppa: fix shrp for wide mode, Sven Schnelle, 2024/03/19
- [PATCH v2 6/6] target/hppa: fix do_stdby_e(),
Sven Schnelle <=
- [PATCH v2 5/6] target/hppa: mask privilege bits in mfia, Sven Schnelle, 2024/03/19
- [PATCH v2 4/6] target/hppa: exit tb on flush cache instructions, Sven Schnelle, 2024/03/19
- [PATCH v2 3/6] target/hppa: fix access_id check, Sven Schnelle, 2024/03/19