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[PULL 19/34] hw/riscv/virt.c: make aclint compatible with 'qtest' accel
From: |
Alistair Francis |
Subject: |
[PULL 19/34] hw/riscv/virt.c: make aclint compatible with 'qtest' accel |
Date: |
Fri, 8 Mar 2024 21:11:37 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
The 'virt' machine makes assumptions on the Advanced Core-Local
Interruptor, or aclint, based on 'tcg_enabled()' conditionals. This
will impact MSI related tests support when adding a RISC-V 'virt' libqos
machine. The accelerator used in that case, 'qtest', isn't being
accounted for and we'll error out if we try to enable aclint.
Create a new virt_aclint_allowed() helper to gate the aclint code
considering both TCG and 'qtest' accelerators. The error message is
left untouched, mentioning TCG only, because we don't expect the
regular user to be aware of 'qtest'.
We want to add 'qtest' support for aclint only, leaving the TCG specific
bits out of it. This is done by changing the current format we use
today:
if (tcg_enabled()) {
if (s->have_aclint) { - aclint logic - }
else { - non-aclint, TCG logic - }
}
into:
if (virt_aclint_allowed() && s->have_aclint) {
- aclint logic -
} else if (tcg_enabled()) {
- non-aclint, TCG logic -
}
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240217192607.32565-6-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/virt.c | 52 +++++++++++++++++++++++++------------------------
1 file changed, 27 insertions(+), 25 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 54ad809b44..a094af97c3 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -48,6 +48,7 @@
#include "sysemu/tcg.h"
#include "sysemu/kvm.h"
#include "sysemu/tpm.h"
+#include "sysemu/qtest.h"
#include "hw/pci/pci.h"
#include "hw/pci-host/gpex.h"
#include "hw/display/ramfb.h"
@@ -61,6 +62,11 @@ static bool virt_use_kvm_aia(RISCVVirtState *s)
return kvm_irqchip_in_kernel() && s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC;
}
+static bool virt_aclint_allowed(void)
+{
+ return tcg_enabled() || qtest_enabled();
+}
+
static const MemMapEntry virt_memmap[] = {
[VIRT_DEBUG] = { 0x0, 0x100 },
[VIRT_MROM] = { 0x1000, 0xf000 },
@@ -725,14 +731,12 @@ static void create_fdt_sockets(RISCVVirtState *s, const
MemMapEntry *memmap,
create_fdt_socket_memory(s, memmap, socket);
- if (tcg_enabled()) {
- if (s->have_aclint) {
- create_fdt_socket_aclint(s, memmap, socket,
- &intc_phandles[phandle_pos]);
- } else {
- create_fdt_socket_clint(s, memmap, socket,
- &intc_phandles[phandle_pos]);
- }
+ if (virt_aclint_allowed() && s->have_aclint) {
+ create_fdt_socket_aclint(s, memmap, socket,
+ &intc_phandles[phandle_pos]);
+ } else if (tcg_enabled()) {
+ create_fdt_socket_clint(s, memmap, socket,
+ &intc_phandles[phandle_pos]);
}
}
@@ -1409,7 +1413,7 @@ static void virt_machine_init(MachineState *machine)
exit(1);
}
- if (!tcg_enabled() && s->have_aclint) {
+ if (!virt_aclint_allowed() && s->have_aclint) {
error_report("'aclint' is only available with TCG acceleration");
exit(1);
}
@@ -1446,23 +1450,22 @@ static void virt_machine_init(MachineState *machine)
hart_count, &error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->soc[i]), &error_fatal);
- if (tcg_enabled()) {
- if (s->have_aclint) {
- if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
- /* Per-socket ACLINT MTIMER */
- riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
+ if (virt_aclint_allowed() && s->have_aclint) {
+ if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
+ /* Per-socket ACLINT MTIMER */
+ riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
i * RISCV_ACLINT_DEFAULT_MTIMER_SIZE,
RISCV_ACLINT_DEFAULT_MTIMER_SIZE,
base_hartid, hart_count,
RISCV_ACLINT_DEFAULT_MTIMECMP,
RISCV_ACLINT_DEFAULT_MTIME,
RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, true);
- } else {
- /* Per-socket ACLINT MSWI, MTIMER, and SSWI */
- riscv_aclint_swi_create(memmap[VIRT_CLINT].base +
+ } else {
+ /* Per-socket ACLINT MSWI, MTIMER, and SSWI */
+ riscv_aclint_swi_create(memmap[VIRT_CLINT].base +
i * memmap[VIRT_CLINT].size,
base_hartid, hart_count, false);
- riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
+ riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
i * memmap[VIRT_CLINT].size +
RISCV_ACLINT_SWI_SIZE,
RISCV_ACLINT_DEFAULT_MTIMER_SIZE,
@@ -1470,21 +1473,20 @@ static void virt_machine_init(MachineState *machine)
RISCV_ACLINT_DEFAULT_MTIMECMP,
RISCV_ACLINT_DEFAULT_MTIME,
RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, true);
- riscv_aclint_swi_create(memmap[VIRT_ACLINT_SSWI].base +
+ riscv_aclint_swi_create(memmap[VIRT_ACLINT_SSWI].base +
i * memmap[VIRT_ACLINT_SSWI].size,
base_hartid, hart_count, true);
- }
- } else {
- /* Per-socket SiFive CLINT */
- riscv_aclint_swi_create(
+ }
+ } else if (tcg_enabled()) {
+ /* Per-socket SiFive CLINT */
+ riscv_aclint_swi_create(
memmap[VIRT_CLINT].base + i * memmap[VIRT_CLINT].size,
base_hartid, hart_count, false);
- riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
+ riscv_aclint_mtimer_create(memmap[VIRT_CLINT].base +
i * memmap[VIRT_CLINT].size + RISCV_ACLINT_SWI_SIZE,
RISCV_ACLINT_DEFAULT_MTIMER_SIZE, base_hartid, hart_count,
RISCV_ACLINT_DEFAULT_MTIMECMP, RISCV_ACLINT_DEFAULT_MTIME,
RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, true);
- }
}
/* Per-socket interrupt controller */
--
2.44.0
- Re: [PULL 09/34] target/riscv: add remaining named features, (continued)
- [PULL 10/34] target/riscv: Reset henvcfg to zero, Alistair Francis, 2024/03/08
- [PULL 11/34] target/riscv: Gate hardware A/D PTE bit updating, Alistair Francis, 2024/03/08
- [PULL 12/34] target/riscv: Promote svade to a normal extension, Alistair Francis, 2024/03/08
- [PULL 13/34] target/riscv: FIX xATP_MODE validation, Alistair Francis, 2024/03/08
- [PULL 14/34] target/riscv: UPDATE xATP write CSR, Alistair Francis, 2024/03/08
- [PULL 15/34] target/riscv: Add missing include guard in pmu.h, Alistair Francis, 2024/03/08
- [PULL 17/34] hw/riscv/virt.c: create '/soc/pci@...' fdt node earlier, Alistair Francis, 2024/03/08
- [PULL 16/34] hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables, Alistair Francis, 2024/03/08
- [PULL 18/34] hw/riscv/virt.c: add virtio-iommu-pci hotplug support, Alistair Francis, 2024/03/08
- [PULL 19/34] hw/riscv/virt.c: make aclint compatible with 'qtest' accel,
Alistair Francis <=
- [PULL 20/34] tests/libqos: add riscv/virt machine nodes, Alistair Francis, 2024/03/08
[PULL 21/34] RISC-V: Add support for Ztso, Alistair Francis, 2024/03/08
[PULL 22/34] linux-user/riscv: Add Ztso extension to hwprobe, Alistair Francis, 2024/03/08
[PULL 23/34] tests: riscv64: Use 'zfa' instead of 'Zfa', Alistair Francis, 2024/03/08
[PULL 24/34] linux-headers: Update to Linux v6.8-rc6, Alistair Francis, 2024/03/08