Re: [PATCH v2 8/9] aspeed: Add an AST2700 eval board

[Cédric Le Goater]

On 3/4/24 10:29, Jamin Lin wrote:
> AST2700 CPU is ARM Cortex-A35 which is 64 bits.
> Add TARGET_AARCH64 to build this machine.
>
> According to the design of ast2700, it has a bootmcu(riscv-32) which
> is used for executing SPL.
> Then, CPUs(cortex-a35) execute u-boot, kernel and rofs.
>
> Currently, qemu not support emulate two CPU architectures
> at the same machine. Therefore, qemu will only support
> to emulate CPU(cortex-a35) side for ast2700
>
> Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/arm/aspeed.c | 32 ++++++++++++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 8854581ca8..4544026d14 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -178,6 +178,12 @@ struct AspeedMachineState {
>   #define AST2600_EVB_HW_STRAP1 0x000000C0
>   #define AST2600_EVB_HW_STRAP2 0x00000003
>   
> +#ifdef TARGET_AARCH64
> +/* AST2700 evb hardware value */
> +#define AST2700_EVB_HW_STRAP1 0x000000C0
> +#define AST2700_EVB_HW_STRAP2 0x00000003
> +#endif
> +
>   /* Tacoma hardware value */
>   #define TACOMA_BMC_HW_STRAP1  0x00000000
>   #define TACOMA_BMC_HW_STRAP2  0x00000040
> @@ -1588,6 +1594,26 @@ static void 
> aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
>       aspeed_machine_class_init_cpus_defaults(mc);
>   }
>   
> +#ifdef TARGET_AARCH64
> +static void aspeed_machine_ast2700_evb_class_init(ObjectClass *oc, void *data)
> +{
> +    MachineClass *mc = MACHINE_CLASS(oc);
> +    AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
> +
> +    mc->desc = "Aspeed AST2700 EVB (Cortex-A35)";
> +    amc->soc_name  = "ast2700-a0";
> +    amc->hw_strap1 = AST2700_EVB_HW_STRAP1;
> +    amc->hw_strap2 = AST2700_EVB_HW_STRAP2;
> +    amc->fmc_model = "w25q01jvq";
> +    amc->spi_model = "w25q512jv";
> +    amc->num_cs    = 2;
> +    amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON;
> +    amc->uart_default = ASPEED_DEV_UART12;
> +    mc->default_ram_size = 1 * GiB;

This seems low. What's the size on real HW  ?

Anyhow,


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


> +    aspeed_machine_class_init_cpus_defaults(mc);
> +}
> +#endif
> +
>   static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
>                                                        void *data)
>   {
> @@ -1711,6 +1737,12 @@ static const TypeInfo aspeed_machine_types[] = {
>           .name           = MACHINE_TYPE_NAME("ast1030-evb"),
>           .parent         = TYPE_ASPEED_MACHINE,
>           .class_init     = aspeed_minibmc_machine_ast1030_evb_class_init,
> +#ifdef TARGET_AARCH64
> +    }, {
> +        .name          = MACHINE_TYPE_NAME("ast2700-evb"),
> +        .parent        = TYPE_ASPEED_MACHINE,
> +        .class_init    = aspeed_machine_ast2700_evb_class_init,
> +#endif
>       }, {
>           .name          = TYPE_ASPEED_MACHINE,
>           .parent        = TYPE_MACHINE,