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[PULL 22/61] target/riscv: add 'vlenb' field in cpu->cfg
From: |
Alistair Francis |
Subject: |
[PULL 22/61] target/riscv: add 'vlenb' field in cpu->cfg |
Date: |
Fri, 9 Feb 2024 20:57:34 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Our usage of 'vlenb' is overwhelming superior than the use of 'vlen'.
We're using 'vlenb' most of the time, having to do 'vlen >> 3' or
'vlen / 8' in every instance.
In hindsight we would be better if the 'vlenb' property was introduced
instead of 'vlen'. That's not what happened, and now we can't easily get
rid of it due to user scripts all around. What we can do, however, is to
change our internal representation to use 'vlenb'.
Add a 'vlenb' field in cpu->cfg. It'll be set via the existing 'vlen'
property, i.e. setting 'vlen' will also set 'vlenb'.
We'll replace all 'vlen >> 3' code to use 'vlenb' directly. Start with
the single instance we have in target/riscv/cpu.c.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240122161107.26737-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu_cfg.h | 1 +
target/riscv/cpu.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index fea14c275f..50479dd72f 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -140,6 +140,7 @@ struct RISCVCPUConfig {
uint32_t pmu_mask;
uint16_t vlen;
+ uint16_t vlenb;
uint16_t elen;
uint16_t cbom_blocksize;
uint16_t cbop_blocksize;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index cce75aec3e..d34e87684d 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -852,7 +852,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
csr_ops[csrno].name, val);
}
}
- uint16_t vlenb = cpu->cfg.vlen >> 3;
+ uint16_t vlenb = cpu->cfg.vlenb;
for (i = 0; i < 32; i++) {
qemu_fprintf(f, " %-8s ", riscv_rvv_regnames[i]);
@@ -1325,6 +1325,7 @@ static void riscv_cpu_init(Object *obj)
/* Default values for non-bool cpu properties */
cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16);
cpu->cfg.vlen = 128;
+ cpu->cfg.vlenb = 128 >> 3;
cpu->cfg.elen = 64;
cpu->cfg.cbom_blocksize = 64;
cpu->cfg.cbop_blocksize = 64;
@@ -1824,6 +1825,7 @@ static void prop_vlen_set(Object *obj, Visitor *v, const
char *name,
cpu_option_add_user_setting(name, value);
cpu->cfg.vlen = value;
+ cpu->cfg.vlenb = value >> 3;
}
static void prop_vlen_get(Object *obj, Visitor *v, const char *name,
--
2.43.0
- [PULL 12/61] target/riscv: move 'elen' to riscv_cpu_properties[], (continued)
- [PULL 12/61] target/riscv: move 'elen' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 14/61] target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 13/61] target/riscv: create finalize_features() for KVM, Alistair Francis, 2024/02/09
- [PULL 15/61] target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 16/61] target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 17/61] target/riscv: remove riscv_cpu_options[], Alistair Francis, 2024/02/09
- [PULL 18/61] target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 19/61] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 20/61] target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 21/61] target/riscv: Implement optional CSR mcontext of debug Sdtrig extension, Alistair Francis, 2024/02/09
- [PULL 22/61] target/riscv: add 'vlenb' field in cpu->cfg,
Alistair Francis <=
- [PULL 23/61] target/riscv/csr.c: use 'vlenb' instead of 'vlen', Alistair Francis, 2024/02/09
- [PULL 25/61] target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb, Alistair Francis, 2024/02/09
- [PULL 24/61] target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen', Alistair Francis, 2024/02/09
- [PULL 26/61] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb', Alistair Francis, 2024/02/09
- [PULL 27/61] target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb', Alistair Francis, 2024/02/09
- [PULL 28/61] target/riscv/vector_helper.c: use 'vlenb', Alistair Francis, 2024/02/09
- [PULL 29/61] target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl), Alistair Francis, 2024/02/09
- [PULL 30/61] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ(), Alistair Francis, 2024/02/09
- [PULL 33/61] trans_rvv.c.inc: use vext_get_vlmax() in trans_vrgather_v*(), Alistair Francis, 2024/02/09
- [PULL 37/61] target/riscv/kvm: get/set vector vregs[], Alistair Francis, 2024/02/09