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[PULL v3 10/38] tcg/ppc: Use PLD in tcg_out_movi for constant pool
From: |
Richard Henderson |
Subject: |
[PULL v3 10/38] tcg/ppc: Use PLD in tcg_out_movi for constant pool |
Date: |
Mon, 23 Oct 2023 11:13:01 -0700 |
The prefixed instruction has a pc-relative form to use here.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 34df9144cc..79e82d2f94 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -101,6 +101,10 @@
#define ALL_GENERAL_REGS 0xffffffffu
#define ALL_VECTOR_REGS 0xffffffff00000000ull
+#ifndef R_PPC64_PCREL34
+#define R_PPC64_PCREL34 132
+#endif
+
#define have_isel (cpuinfo & CPUINFO_ISEL)
#ifndef CONFIG_SOFTMMU
@@ -266,6 +270,19 @@ static bool reloc_pc14(tcg_insn_unit *src_rw, const
tcg_insn_unit *target)
return false;
}
+static bool reloc_pc34(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
+{
+ const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
+ ptrdiff_t disp = tcg_ptr_byte_diff(target, src_rx);
+
+ if (disp == sextract64(disp, 0, 34)) {
+ src_rw[0] = (src_rw[0] & ~0x3ffff) | ((disp >> 16) & 0x3ffff);
+ src_rw[1] = (src_rw[1] & ~0xffff) | (disp & 0xffff);
+ return true;
+ }
+ return false;
+}
+
/* test if a constant matches the constraint */
static bool tcg_target_const_match(int64_t val, TCGType type, int ct, int vece)
{
@@ -696,6 +713,8 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
return reloc_pc14(code_ptr, target);
case R_PPC_REL24:
return reloc_pc24(code_ptr, target);
+ case R_PPC64_PCREL34:
+ return reloc_pc34(code_ptr, target);
case R_PPC_ADDR16:
/*
* We are (slightly) abusing this relocation type. In particular,
@@ -1155,6 +1174,11 @@ static void tcg_out_movi_int(TCGContext *s, TCGType
type, TCGReg ret,
tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0));
return;
}
+ if (have_isa_3_10) {
+ tcg_out_8ls_d(s, PLD, ret, 0, 0, 1);
+ new_pool_label(s, arg, R_PPC64_PCREL34, s->code_ptr - 2, 0);
+ return;
+ }
if (have_isa_3_00) {
tcg_out_addpcis(s, TCG_REG_TMP2, 0);
new_pool_label(s, arg, R_PPC_REL14, s->code_ptr, 0);
--
2.34.1
- [PULL v3 00/38] tcg patch queue, Richard Henderson, 2023/10/23
- [PULL v3 01/38] tcg/ppc: Untabify tcg-target.c.inc, Richard Henderson, 2023/10/23
- [PULL v3 02/38] tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB, Richard Henderson, 2023/10/23
- [PULL v3 03/38] tcg/ppc: Reinterpret tb-relative to TB+4, Richard Henderson, 2023/10/23
- [PULL v3 06/38] tcg/ppc: Use ADDPCIS for the constant pool, Richard Henderson, 2023/10/23
- [PULL v3 09/38] tcg/ppc: Use prefixed instructions in tcg_out_mem_long, Richard Henderson, 2023/10/23
- [PULL v3 04/38] tcg/ppc: Use ADDPCIS in tcg_out_tb_start, Richard Henderson, 2023/10/23
- [PULL v3 08/38] tcg/ppc: Use PADDI in tcg_out_movi, Richard Henderson, 2023/10/23
- [PULL v3 12/38] tcg/ppc: Use PLD in tcg_out_goto_tb, Richard Henderson, 2023/10/23
- [PULL v3 11/38] tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec, Richard Henderson, 2023/10/23
- [PULL v3 10/38] tcg/ppc: Use PLD in tcg_out_movi for constant pool,
Richard Henderson <=
- [PULL v3 05/38] tcg/ppc: Use ADDPCIS in tcg_out_movi_int, Richard Henderson, 2023/10/23
- [PULL v3 07/38] tcg/ppc: Use ADDPCIS in tcg_out_goto_tb, Richard Henderson, 2023/10/23
- [PULL v3 14/38] tcg: Introduce tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 16/38] tcg/arm: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 13/38] tcg/ppc: Disable TCG_REG_TB for Power9/Power10, Richard Henderson, 2023/10/23
- [PULL v3 18/38] tcg/i386: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 20/38] tcg/mips: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 22/38] tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero, Richard Henderson, 2023/10/23
- [PULL v3 21/38] tcg/ppc: Use tcg_use_softmmu, Richard Henderson, 2023/10/23
- [PULL v3 17/38] tcg/aarch64: Use tcg_use_softmmu, Richard Henderson, 2023/10/23