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[PULL 53/83] hw/isa/piix3: Create IDE controller in host device
From: |
Michael S. Tsirkin |
Subject: |
[PULL 53/83] hw/isa/piix3: Create IDE controller in host device |
Date: |
Wed, 18 Oct 2023 11:57:23 -0400 |
From: Bernhard Beschow <shentey@gmail.com>
The IDE controller is an integral part of PIIX3 (function 1). So create it as
part of the south bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-12-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/southbridge/piix.h | 2 ++
hw/i386/pc_piix.c | 13 ++++++-------
hw/isa/piix3.c | 9 +++++++++
hw/i386/Kconfig | 1 -
hw/isa/Kconfig | 1 +
5 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index b07ff6bb26..1daeff397c 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -13,6 +13,7 @@
#define HW_SOUTHBRIDGE_PIIX_H
#include "hw/pci/pci_device.h"
+#include "hw/ide/pci.h"
#include "hw/rtc/mc146818rtc.h"
/* PIRQRC[A:D]: PIRQx Route Control Registers */
@@ -52,6 +53,7 @@ struct PIIXState {
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
MC146818RtcState rtc;
+ PCIIDEState ide;
/* Reset Control Register contents */
uint8_t rcr;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5988656279..c98a997482 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -43,7 +43,6 @@
#include "net/net.h"
#include "hw/ide/isa.h"
#include "hw/ide/pci.h"
-#include "hw/ide/piix.h"
#include "hw/irq.h"
#include "sysemu/kvm.h"
#include "hw/i386/kvm/clock.h"
@@ -290,6 +289,10 @@ static void pc_init1(MachineState *machine,
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+ pci_ide_create_devs(PCI_DEVICE(dev));
+ idebus[0] = qdev_get_child_bus(dev, "ide.0");
+ idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
isa_bus = isa_bus_new(NULL, system_memory, system_io,
&error_abort);
@@ -301,6 +304,8 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
+ idebus[0] = NULL;
+ idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -329,12 +334,6 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
- PCIDevice *dev;
-
- dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
- pci_ide_create_devs(dev);
- idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 11d72ca2bb..3f1dabade0 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -29,6 +29,7 @@
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/piix.h"
#include "hw/isa/isa.h"
#include "sysemu/runstate.h"
#include "migration/vmstate.h"
@@ -265,6 +266,7 @@ static const MemoryRegionOps rcr_ops = {
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
uint32_t irq;
@@ -290,6 +292,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
}
irq = object_property_get_uint(OBJECT(&d->rtc), "irq", &error_fatal);
isa_connect_gpio_out(ISA_DEVICE(&d->rtc), 0, irq);
+
+ /* IDE */
+ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+ if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+ return;
+ }
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -321,6 +329,7 @@ static void pci_piix3_init(Object *obj)
ISA_NUM_IRQS);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static void pci_piix3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index 9051083c1e..ade817f1b6 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -73,7 +73,6 @@ config I440FX
select PC_ACPI
select PCI_I440FX
select PIIX3
- select IDE_PIIX
select DIMM
select SMBIOS
select FW_CFG_DMA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index c10cbc5fc1..28345edbb3 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -34,6 +34,7 @@ config PC87312
config PIIX3
bool
select I8257
+ select IDE_PIIX
select ISA_BUS
select MC146818RTC
--
MST
- [PULL 30/83] vhost-user: tighten "reply_supported" scope in "set_vring_addr", (continued)
- [PULL 30/83] vhost-user: tighten "reply_supported" scope in "set_vring_addr", Michael S. Tsirkin, 2023/10/18
- [PULL 34/83] vhost-user: allow "vhost_set_vring" to wait for a reply, Michael S. Tsirkin, 2023/10/18
- [PULL 35/83] vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously, Michael S. Tsirkin, 2023/10/18
- [PULL 38/83] vhost-backend: remove vhost_kernel_reset_device(), Michael S. Tsirkin, 2023/10/18
- [PULL 39/83] virtio: call ->vhost_reset_device() during reset, Michael S. Tsirkin, 2023/10/18
- [PULL 43/83] hw/i386/pc: Merge two if statements into one, Michael S. Tsirkin, 2023/10/18
- [PULL 46/83] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS, Michael S. Tsirkin, 2023/10/18
- [PULL 45/83] hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize(), Michael S. Tsirkin, 2023/10/18
- [PULL 47/83] hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property, Michael S. Tsirkin, 2023/10/18
- [PULL 49/83] hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in", Michael S. Tsirkin, 2023/10/18
- [PULL 53/83] hw/isa/piix3: Create IDE controller in host device,
Michael S. Tsirkin <=
- [PULL 58/83] hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in", Michael S. Tsirkin, 2023/10/18
- [PULL 54/83] hw/isa/piix3: Create USB controller in host device, Michael S. Tsirkin, 2023/10/18
- [PULL 57/83] hw/isa/piix4: Remove unused inbound ISA interrupt lines, Michael S. Tsirkin, 2023/10/18
- [PULL 59/83] hw/isa/piix4: Rename reset control operations to match PIIX3, Michael S. Tsirkin, 2023/10/18
- [PULL 61/83] hw/isa/piix3: Merge hw/isa/piix4.c, Michael S. Tsirkin, 2023/10/18
- [PULL 56/83] hw/isa/piix3: Drop the "3" from PIIX base class name, Michael S. Tsirkin, 2023/10/18
- [PULL 62/83] hw/isa/piix: Allow for optional PIC creation in PIIX3, Michael S. Tsirkin, 2023/10/18
- [PULL 55/83] hw/isa/piix3: Create power management controller in host device, Michael S. Tsirkin, 2023/10/18
- [PULL 64/83] hw/isa/piix: Harmonize names of reset control memory regions, Michael S. Tsirkin, 2023/10/18
- [PULL 66/83] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4, Michael S. Tsirkin, 2023/10/18